Vertical GaN-Based Trench Gate Metal Oxide Semiconductor Field-Effect Transistors on GaN Bulk Substrates

Abstract-We demonstrate the first GaN vertical transistor on silicon, based on a 6.7-μm-thick n-p-n heterostructure grown on 6-inch silicon substrate by metal organic chemical vapor deposition (MOCVD). The devices consist of trench-gate quasi-vertical metal-oxide-semiconductor field-effect transistors (MOSFETs) with a 4 μm-thick drift layer, exhibiting enhancement-mode (E-mode) operation with a threshold voltage of 6.3 V and an on/off ratio of over 10 8 . A high off-state breakdown voltage of 645 V along with a specific on-resistance of 6.8 mΩ•cm 2 were achieved thanks to the high-quality 4 μm-thick GaN drift layer presenting a relatively low defect density and very high electron mobility (720 cm 2 /V•s). This excellent performance represents a major step towards the realization of high-performance GaN vertical power transistors on low-cost silicon substrates.

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“…The larger channel resistivity is mainly due to our poorer channel mobility of 17.8 cm 2 /(V•s), compared to 131 cm 2 /(V•s) in Ref. [9]. Fig.…”

Section: Resultsmentioning

confidence: 70%

“…[8] and [9] (this value is underestimated due to additional series resistance induced by the thick drift layer (4 μm) [32]). The lower µch is likely due to the typically larger defect density of GaN on silicon compared to that on bulk GaN substrates.…”

Section: Resultsmentioning

confidence: 99%

GaN-on-Si Quasi-Vertical Power MOSFETs

Liu

Khadar

Matioli

2018

IEEE Electron Device Lett.

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“…The doping concentrations of these GaN layers are 1×10 18 cm -3 , 1×10 16 cm -3 , 1×10 17 cm -3 , and 1×10 18 cm -3 , in sequence. The sidewall gate angle is defined as the acute angle between the substrate and the sidewall, as indicated at the right-side bottom of the gate in Fig.…”

Section: Device Structurementioning

confidence: 95%

“…Vertical channel provides advantages of high current density per unit area and scalability of gate length. Also, it helps achieving simpler and less destructive processing (less damage) getting rid of either ion implantation process or electron-beam irradiation in device fabrication than lateral channel, since a vertical GaN device is usually fabricated by epitaxial growths [16][17][18]. In addition, the cylindrical-shaped structure brings higher gate controllability and enhanced current drivability [19][20][21][22].…”

Section: Introductionmentioning

confidence: 99%

Electrical Characteristics of Enhancement-Mode n-Channel Vertical GaN MOSFETs and the Effects of Sidewall Slope

Kim¹,

Seo²,

Yoon³

et al. 2015

Journal of Electrical Engineering and Technology

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-Gallium nitride (GaN) is a promising material for next-generation high-power applications due to its wide bandgap, high breakdown field, high electron mobility, and good thermal conductivity. From a structure point of view, the vertical device is more suitable to high-power applications than planar devices because of its area effectiveness. However, it is challenging to obtain a completely upright vertical structure due to inevitable sidewall slope in anisotropic etching of GaN. In this letter, we design and analyze the enhancement-mode n-channel vertical GaN MOSFET with variation of sidewall gate angle by two-dimensional (2D) technology computer-aided design (TCAD) simulations. As the sidewall slope gets closer to right angle, the device performances are improved since a gradual slope provides a leakage current path through the bulk region.

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“…Most of GaN MOSFETs belong to the lateral devices [7,8], however rst vertical devices were also demonstrated [9,10]. This is due to the lack of availability of good quality single crystal gallium nitride substrates.…”

mentioning

confidence: 99%

High Quality Gate Insulator/GaN Interface for Enhancement-Mode Field Effect Transistor

et al. 2011

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The capacitancevoltage measurements were applied for characterization of the semiconductor/dielectric interface of GaN MOS capacitors with SiO2 and HfO2/SiO2 gate stacks. From the Terman method low density of interface traps (Dit ≈ 10 11 eV −1 cm −2 ) at SiO2/GaN interface was calculated for as-deposited samples. Samples with HfO2/SiO2 gate stacks have higher density of interface traps as well as higher density of mobile charge and eective charge in the dielectric layers. High quality of SiO2/GaN interface shows applicability of SiO2 as a gate dielectric in GaN MOSFET transistors.

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Vertical GaN-Based Trench Gate Metal Oxide Semiconductor Field-Effect Transistors on GaN Bulk Substrates

Cited by 196 publications

References 16 publications

GaN-on-Si Quasi-Vertical Power MOSFETs

GaN-on-Si Quasi-Vertical Power MOSFETs

Electrical Characteristics of Enhancement-Mode n-Channel Vertical GaN MOSFETs and the Effects of Sidewall Slope

High Quality Gate Insulator/GaN Interface for Enhancement-Mode Field Effect Transistor

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