Verification of theoretical model for collector current in SiGe‐based heterojunction bipolar transistors

Abstract

The theoretical collector current model for SiGe-based heterojunction bipolar transistors under parallel-perpendicular kinetic energy coupling and anisotropic masses was validated. Verification was performed by comparison to Monte Carlo (MC) calculations and experimental data obtained from previous publications. Collector current against base-emitter voltage obtained by the present model is comparable to that calculated by the MC method. The measured collector currents as a function of base-collector voltage agreed well with the calculated currents for base-emitter voltages ranging from 0.3 to 0.6 V.Introduction: A theoretical model of carrier transport in heterojunction bipolar transistors (HBTs) is required for improving performance and increasing the speed of devices. Generally, theoretical studies of carrier transport in HBTs use energy-transport, hydrodynamic transport, drift-diffusion transport and quantum transport models [1]. On the other hand, recent work has shown theoretically and has been verified experimentally that the gate leakage currents of metal-oxide semiconductor devices with high-K gate dielectrics are affected significantly by gate electron phase velocity when the phase velocity is higher than thermal velocity [2]. The gate electron phase velocity is applicable because the longitudinal and transverse components of electron motion in a heterostructure are coupled under the effective mass approximation [3]. In addition, a wide-gap emitter of an HBT can inject carriers with velocities higher than the thermal velocity into a narrow-gap base using excess kinetic energy due to the band offset at the emitter-base heterojunction [4]. Recently, we derived the motion of an electron with phase velocity in an HBT with anisotropic masses under an applied bias voltage [5]. In this Letter, verification of the model by comparing it to experimental data from previous papers is reported. The results are discussed in detail.

Effect of Si interface surface roughness to the tunneling current of the Si/Si1-xGex/Si heterojunction bipolar transistor

“…This will cause the tunneling currents increase as the Ge content virtual substrate increased. The collector current, for Ge content of 20%, at V BE above 0.6 V is investigated by comparing it with the fullband Monte Carlo (MC) simulation 9 . The electron velocity that used for fitting with MC simulation is the same as before and the result obtained is similar until V BE below 0.8 V. …”

Inovasi dan Kreasi Mampu Mengatasi Keterbatasan dalam Penelitian Material Dimensi Dua, Nol, dan Satu di Indonesia

“…Semakin kecil kecepatan fasanya, arus terobosan dengan kopling tersebut semakin mengecil. Dengan membandingkan arus kolektor dari transistor bipolar Si(110)/Si 0.8 Ge 0.2 /Si(110) yang diperoleh dari pengukuran, arus yang dihitung dengan metoda kopling tersebut dan kecepatan fasa 2,75-4,00×10 6 m/s sangat bersesuaian [5], seperti diberikan dalam Gambar 8.(b). Perbedaan yang kecil dari kedua rapat arus tersebut disebabkan oleh tegangan Early karena kenaikan arus kolektor sebagai akibat dari penurunan lebar basis netral dengan tegangan basis-kolektor [6].…”

“…Perbedaan yang kecil dari kedua rapat arus tersebut disebabkan oleh tegangan Early karena kenaikan arus kolektor sebagai akibat dari penurunan lebar basis netral dengan tegangan basis-kolektor [6]. yang dihitung dan diukur [5] Karena lapisan sangat tipis SiO 2 kurang dari 1 nm tidak dapat digunakan, oksida dengan tetapan dielektrik tinggi kemudian digunakan sebagai penggantinya. Model kopling energi kinetik sejajartegak lurus dan massa anisotropik kemudian diterapkan pada MOS TiN/HfSiO x N/SiO 2 /p-Si.…”