Vehicle Detection Algorithm for FPGA Based Implementation

Pamuła, W.

doi:10.1007/978-3-540-93905-4_68

Cited by 4 publications

(3 citation statements)

References 10 publications

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“…The selective update block works similarly to the nonselective, but uses information from the final steps of the algorithm, as can be seen in (10) and 11 Comparison of the proposed background subtraction algorithm with the standard algorithm [35]: (a)-input image (frame #949) from PETS2001 Camera 1 sequence [45] resized to 128×128 pixels, (b)-manually marked ground truth, (c)-unfiltered result from MOG algorithm [35] with K=3 distributions, (d)-result from the proposed background subtraction algorithm, (e)-input image (frame #1314) from obw2_d3 sequence, (f)-manually marked ground truth, (g)-unfiltered result from MOG algorithm [35] with K=3 distributions, (h)-result from the proposed background subtraction algorithm.…”

Section: Selective Background Update Blockmentioning

confidence: 99%

“…Most such systems are built using high resolution cameras connected via a highbandwidth link to the processing center. The need for automated processing of video data is obvious and many solutions of systems for traffic analysis can be found in the literature [1][2][3][4][5][6][7][8][9][10]. This paper describes an approach which uses a single, stationary, constant zoom, monochrome camera to detect moving and recently stopped vehicles.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

FPGA-Based Real-Time Implementation of Detection Algorithm for Automatic Traffic Surveillance Sensor Network

Wójcikowski

Żaglewski

Pankiewicz

2011

J Sign Process Syst

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This paper describes the FPGA-based hardware implementation of an algorithm for an automatic traffic surveillance sensor network. The aim of the algorithm is to extract moving vehicles from real-time camera images for the evaluation of traffic parameters, such as the number of vehicles, their direction of movement and their approximate speed, using low power hardware of a sensor network node. A single, stationary, monochrome camera is used, mounted at a location high above the road. Occlusions are not detected, however simple shadow and highlight elimination is performed. The algorithm is designed for frame-rate efficiency and is specially suited for pipelined hardware implementation. The authors, apart from the careful selection of particular steps of the algorithm and the modifications towards parallel implementation, also proposed novel improvements such as backgrounds' binary mask combination or non-linear functions in highlight detection, resulting in increasing the robustness and efficiency of hardware realization. The algorithm has been implemented in FPGA and tested on real-time video streams from an outdoor camera.

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Section: Selective Background Update Blockmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

FPGA-Based Real-Time Implementation of Detection Algorithm for Automatic Traffic Surveillance Sensor Network

Wójcikowski

Żaglewski

Pankiewicz

2011

J Sign Process Syst

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show abstract

“…In [18] an adaptive background estimation on image divided into non-overlapped blocks is described, with PCbased implementation capable of 15 fps image processing. In [19,20], FPGA-based implementations are proposed, where some regions of interest are defined and analyzed in the observed image. The self-contained computer system running Linux with the attached camera is described in [21], where the authors demonstrate the application of simple background detection algorithm.…”

Section: Introductionmentioning

confidence: 99%

Hardware-Software Implementation of a Sensor Network for City Traffic Monitoring Using the FPGA- and ASIC-Based Sensor Nodes

Wójcikowski

Żaglewski

Pankiewicz

et al. 2012

J Sign Process Syst

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This paper presents a prototype sensor network for monitoring urban traffic. The sensor network node, equipped with a low-resolution camera, observes the street and detects moving objects. Object detection is based on the custom video segmentation algorithm, using dual background subtraction, edge detection and shadow detection, running on dedicated multi-processor SoC hardware. The number and the speed of the detected objects are transmitted using a low-power license-free radio transceiver to another neighboring node. All the nodes create a self-organized network, data are aggregated at the nodes and passed further to the nodes closer to data sinks. Finally, information about the traffic flow is collected from the sinks and visualized on a PC. The prototype sensor network node has been realized in two versions: FPGA and ASIC. The ASIC version consumes approximately 500 mW and it can be powered from a photovoltaic solar panel combined with a single cell Li-Po battery. The comparison of power consumption of both versions has also been made. Apart from collecting traffic data, the proposed sensor network can gather environmental data, such as the temperature, the acoustic noise or the intensity of the sunlight. The set of 26 prototype sensors has been mounted on street lamp-poles on streets and tested in real conditions.

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Traffic Flow Analysis Based on the Real Data Using Neural Networks

Pamuła¹

2012

Telematics in the Transport Environment

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Vehicle Detection Algorithm for FPGA Based Implementation

Cited by 4 publications

References 10 publications

FPGA-Based Real-Time Implementation of Detection Algorithm for Automatic Traffic Surveillance Sensor Network

FPGA-Based Real-Time Implementation of Detection Algorithm for Automatic Traffic Surveillance Sensor Network

Hardware-Software Implementation of a Sensor Network for City Traffic Monitoring Using the FPGA- and ASIC-Based Sensor Nodes

Traffic Flow Analysis Based on the Real Data Using Neural Networks

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