Variable Clock and EM Signal Generation Scheme for Foveation-Based Driving OLED Head-Mounted Displays

Bae, Jung Ho; Lee, Junhee; Nam, Hyoungsik

doi:10.3390/electronics10050538

Cited by 5 publications

(4 citation statements)

References 31 publications

(36 reference statements)

Supporting

Mentioning

Contrasting

Order By: Relevance

“…For 1/2, 1/4, and 1/8 resolution areas, 2, 4, and 8 lines are driven at the same time, respectively, resulting in the reduction on the effective number of lines by the same factors. The multi-line driving shift registers are implemented based on the Q-node sharing architecture described in Section 2.6 [92,93] and the output pulse sequences are adjusted by changing the timing of the clock signals [113]. Effective numbers of lines are reduced to 30.3 % and 21.0 % for 4,800 × 4,800 and 9,600 × 9,600 resolutions, respectively.…”

Section: Multi-line Drivingmentioning

confidence: 99%

Review of Integrated Gate Driver Circuits in Active Matrix Thin-Film Transistor Display Panels

Chang,

Jeong,

Kim

et al. 2024

Preprint

View full text Add to dashboard Cite

Many advanced technologies have been employed in the high performance active matrix displays including liquid crystal displays, organic light emitting diode displays, and micro light emitting diode displays. On the other side, there have existed the strong demand on the cost reduction and it is one of low cost schemes to integrate the driver circuit in a panel based on thin film transistor technologies. This paper reviews overall concept, operation principles, and various circuit approaches in shift registers for the scanning pulse generation. In addition, it deals with the implementation of additional functionalities in gate drivers to support pixel compensation, multi-line driving, in-cell capacitive touch screen, pixel sensing, and adaptive scanning region control.

show abstract

Section: Multi-line Drivingmentioning

confidence: 99%

Review of Integrated Gate Driver Circuits in Active Matrix Thin-Film Transistor Display Panels

Chang,

Jeong,

Kim

et al. 2024

Preprint

View full text Add to dashboard Cite

show abstract

“…Since the duty ratio is only changed by the hard-wired input signals that are the output signals from other scanning shift registers, there do not exist any ways to adjust the pulsewidth after the fabrication. The equivalent approach has been also reported to support the foveation-based driving circuit for the high-resolution headmounted AMOLED display [22]. Another LTPO circuit has been proposed to control EM pulse widths by the number of the input pulses that have the pulsewidth of one line time [23].…”

Section: Introductionmentioning

confidence: 99%

Fine-Tunable Emission Pulse Generation Circuit Based on p-Type Low-Temperature Poly-Si Thin-Film Transistors for Active Matrix Organic Light-Emitting Diode Displays

Chang

Kim

Nam

2023

IEEE Trans. Electron Devices

View full text Add to dashboard Cite

Active matrix organic light-emitting diode (AMOLED) displays have deployed the compensation techniques to cope with the luminance non-uniformity issues caused by variations on electrical characteristics of thin-film transistors (TFTs). While some compensation circuits require control signals of longer pulse widths than a line time, the luminance control as well as the higher bit depth representation have been also accomplished by adjusting the pulse widths. A proposed EM pulse generation circuit consists of 11 p-type low-temperature poly-Si (LTPS) TFTs and a one coupling capacitor. While previous tunable circuits could address pulse widths of either even or odd multiples of a line time, the proposed circuit can generate any multiples by changing phases of additional clock signals. In particular, the internal inverter is implemented with a load connected to the output of a previous stage's inverter to reduce the power consumption over pulse widths. The coupling capacitor is also connected between two adjacent stages through one TFT, eliminating coupling noises on the output pulses. The proposed EM circuit is simulated at a line time of 3.8 µs for a 120 Hz 3840 × 2160 display. The results ensure that pulse widths from three to 2160 lines are generated successfully without coupling noises and the small variation on power consumption from 1.23 to 0.33 mW is achieved at 30 stages for the whole range of pulse widths, compared to the large range from 1.26 to 76.91 mW with the inverter of a diodeconnected load.

show abstract

“…However, they all need high resolution and high frame rate panels of several thousands of lines, where pixels must be driven within the very short period of time of less than 1 µs. Since it is difficult to charge the pixel in such a narrow time slot, the foveation-based driving scheme has been come up with [11], [12]. Whereas previous foveated rendering technologies require the restoration of the full resolution image right before driving a panel, this foveationbased driving method recovers foveated rendering images directly on the panel by charging multiple lines of pixels at the same time.…”

Section: Introductionmentioning

confidence: 99%

“…This paper proposes a low complexity SR framework integrated with the previous foveation-based driving scheme for VR head mounted displays (HMDs) [11], [12]. Because the display areas are manipulated with different resolutions according to the distance from the foveation point, the proposed scheme needs only to focus on the small region around the foveation point.…”

Section: Introductionmentioning

confidence: 99%

Complexity-Reduced Super Resolution for Foveation-Based Driving Head Mounted Displays

Nam

Kang

2021

IEEE Access

Self Cite

View full text Add to dashboard Cite

In this paper, we propose a foveation-based super resolution (SR) algorithm to create high resolution images from low resolution inputs for virtual reality head mounted displays. Because the proposed SR algorithm is integrated in the previous foveation-based driving technology to cover the small area around the foveation point that requires high rendering quality, the overall computational complexity is substantially reduced, compared to the whole area SR. The target display has 4 times as high resolution as the input image, therefore, the proposed SR algorithm generates 4× as well as 2× SR images at the same time. To support two SR output images, small area SR, and small number of weights, we employ cropping as well as progressive and recursive framework used in the previous MS-LapSRN. We reduce the number of neurons by placing the deconvolutional layer after convolutional layers, compared to the MS-LapSRN. PSNR and SSIM performances of the proposed SR for the 4× scale are estimated as 31.152 dB and 0.935 for Set5, 26.656 dB and 0.858 for Set14, 27.138 dB and 0.830 for BSD100, and 25.078 dB and 0.836 for Urban100. For the target 8K display of 7,680×4,320, the proposed FovSR-integrated driving technology achieves the substantial reductions by 76.7 % and 99.02 % on the number of lines from 7,680 to 1,788 and the number of neurons from 24,518,246,400 to 239,541,184, respectively.

show abstract

Variable Clock and EM Signal Generation Scheme for Foveation-Based Driving OLED Head-Mounted Displays

Cited by 5 publications

References 31 publications

Review of Integrated Gate Driver Circuits in Active Matrix Thin-Film Transistor Display Panels

Review of Integrated Gate Driver Circuits in Active Matrix Thin-Film Transistor Display Panels

Fine-Tunable Emission Pulse Generation Circuit Based on p-Type Low-Temperature Poly-Si Thin-Film Transistors for Active Matrix Organic Light-Emitting Diode Displays

Complexity-Reduced Super Resolution for Foveation-Based Driving Head Mounted Displays

Contact Info

Product

Resources

About