In this P-I-N architecture, the NiO with advantages of high transmittance and wide bandgap (3.4-4.0 eV), [7][8][9] is the most popular hole-transporting layer (HTL). However, the efficiency development of NiO-based devices is still lagging behind normal TiO 2 -based PSCs. [10][11][12][13] The inferior performance is closely related to the undesirable hole extraction efficiency at NiO/ perovskite interface. [14][15][16][17] This would lead to severe charge accumulation and nonradiative recombination, which is mainly reflected in the loss of open-circuit voltage (V oc ) and fill factor (FF). [14,[18][19][20][21] Therefore, how to enhance interfacial hole extraction efficiency is critical for efficient NiO-based devices. [22,23] A popular strategy to ensure fast hole transport at NiO/perovskite interface is doping NiO to optimize its p-type conductivity and energy level. [24][25][26][27][28] Up to present, various high-performance PSCs have been reported for doped NiO HTLs, such as Zn:NiO (19.60%), [26] Cu:NiO (20.15%), [27] Cs:NiO (19.35%), [28] and K:NiO (18.05%). [29] Lately, the champion PCEs of 20.8% have also been realized for Al:NiO-based device. [30] Despite these efforts, it is worth noting that such ideally doped film needs to be uniform and thin enough (<30 nm), otherwise the numerous crystal lattice defects induced by ionic doping would also degrade the carrier mobility. [31,32] The complicated and uncontrollable process of this approach makes it still challenging, develop a more reliable and universal strategy is imperative.Ration design of interface materials, such as metal oxide, carbon materials, and other buffer interlayers, would be a promising solution, as they can well match with the perovskite layer, and combine high conductivity with fast charge transport to minimize the nonradiative recombination loss. [33][34][35] For example, Li et al. incorporated the unique CNT@graphene hybrid nanostructure at perovskite/Spiro-OMeTAD interface to optimize the electrical performance and energy level alignment. The efficient charge collection, optimized hole transport, and reduced recombination result in the performance of normal TiO 2 -based device up to 19.56%. [33] Regrettably, there are few works focusing on interface interlayer design in P-I-N devices. It is of great significance to seek efficient material candidates to modify NiO/perovskite interface.Herein, we design the unique NiO x /carbon heterostructures (NCHs) as anode buffer interlayer for inverted NiO-based PSCs. Such NCHs interlayer offer the huge superiority for hole extraction and transportation at anode An efficient hole transport layer (HTL) with desirable charge separation and hole extraction efficiency is crucial for inverted perovskite solar cells. However, the interfacial trap recombination loss and mismatched band alignment limit the actual performance of device, especially the open-circuit voltage (V OC ). To address this issue, a unique NiO x /carbon heterostructure is designed as efficient anode interlayer for optimizing the interf...