Using Data Postcompensation and Predistortion to Tolerate Cell-to-Cell Interference in MLC nand Flash Memory

Dong, Guiqiang; Shu, Li; Zhang, Tong

doi:10.1109/tcsi.2010.2046966

Cited by 130 publications

(116 citation statements)

References 23 publications

(18 reference statements)

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“…Third, these previous works [3] [4] did not show the threshold voltage distribution shifts due to program interference, which we rigorously analyze in this paper. Finally, there are several other works that provided models for program interference [5][6] [7], yet their models were based on simulations which in turn were based on intuitive assumptions that were not verified via experimental characterization of real flash memory chips. In this work, our goal is to provide a comprehensive and rigorous characterization of program interference based on experimental data from real 2Y-nm flash memory chips.…”

Section: Previous Work On Modeling Program Interferencementioning

confidence: 99%

Program interference in MLC NAND flash memory: Characterization, modeling, and mitigation

Cai

Mutlu

Haratsch³

et al. 2013

2013 IEEE 31st International Conference on Computer Design (ICCD)

167

200

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Abstract-As NAND flash memory continues to scale down to smaller process technology nodes, its reliability and endurance are degrading. One important source of reduced reliability is the phenomenon of program interference: when a flash cell is programmed to a value, the programming operation affects the threshold voltage of not only that cell, but also the other cells surrounding it. This interference potentially causes a surrounding cell to move to a logical state (i.e., a threshold voltage range) that is different from its original state, leading to an error when the cell is read. Understanding, characterizing, and modeling of program interference, i.e., how much the threshold voltage of a cell shifts when another cell is programmed, can enable the design of mechanisms that can effectively and efficiently predict and/or tolerate such errors.In this paper, we provide the first experimental characterization of and a realistic model for program interference in modern MLC NAND flash memory. To this end, we utilize the read-retry mechanism present in some state-of-the-art 2Y-nm (i.e., 20-24nm) flash chips to measure the changes in threshold voltage distributions of cells when a particular cell is programmed. Our results show that the amount of program interference received by a cell depends on 1) the location of the programmed cells, 2) the order in which cells are programmed, and 3) the data values of the cell that is being programmed as well as the cells surrounding it. Based on our experimental characterization, we develop a new model that predicts the amount of program interference as a function of threshold voltage values and changes in neighboring cells. We devise and evaluate one application of this model that adjusts the read reference voltage to the predicted threshold voltage distribution with the goal of minimizing erroneous reads. Our analysis shows that this new technique can reduce the raw flash bit error rate by 64% and thereby improve flash lifetime by 30%. We hope that the understanding and models developed in this paper lead to other error tolerance mechanisms for future flash memories.

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Section: Previous Work On Modeling Program Interferencementioning

confidence: 99%

Program interference in MLC NAND flash memory: Characterization, modeling, and mitigation

Cai

Mutlu

Haratsch³

et al. 2013

2013 IEEE 31st International Conference on Computer Design (ICCD)

167

200

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“…This phenomenon occurs when a cell is programmed; when charge is injected into a cell, that cell's physical neighbors also receive a small increase in charge due to the parasitic capacitance between cells. Put another way, a victim cell's charge will increase when its physical neighbors are programmed [3], [7].…”

Section: Introductionmentioning

confidence: 99%

Constructions for constant-weight ICI-free codes

Kayser

Siegel

2014

2014 IEEE International Symposium on Information Theory

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Abstract-In this paper, we consider the joint coding constraint of forbidding the 101 subsequence and requiring all codewords to have the same Hamming weight. These two constraints are particularly applicable to SLC flash memory -the first constraint mitigates the problem of inter-cell interference, while the second constraint helps to alleviate the problems that arise from voltage drift of programmed cells. We give a construction for codes that satisfy both constraints, then analyze properties of best-case codes that can come from this construction.

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“…This leads to three cases: 1) The read data of a cell remains unchanged upon the NAC reading. This is the case for cells of type-N11 with threshold voltage larger than REFx or smaller than REFx 11 . 2) The new data read using REFx 11 is correct and the old data read using REFx was incorrect.…”

Section: Prioritized Nacmentioning

confidence: 96%

“…2) The new data read using REFx 11 is correct and the old data read using REFx was incorrect. This is the case for cells of type-N11 in P i+1 state with threshold voltage in the window [REFx 11 , REFx].…”

Section: Prioritized Nacmentioning

confidence: 99%

Neighbor-cell assisted error correction for MLC NAND flash memories

Cai

Yalcin

Mutlu

et al. 2014

SIGMETRICS Perform. Eval. Rev.

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Continued scaling of NAND flash memory to smaller process technology nodes decreases its reliability, necessitating more sophisticated mechanisms to correctly read stored data values. To distinguish between different potential stored values, conventional techniques to read data from flash memory employ a single set of reference voltage values, which are determined based on the overall threshold voltage distribution of flash cells. Unfortunately, the phenomenon of program interference, in which a cell's threshold voltage unintentionally changes when a neighboring cell is programmed, makes this conventional approach increasingly inaccurate in determining the values of cells. This paper makes the new empirical observation that identifying the value stored in the immediate-neighbor cell makes it easier to determine the data value stored in the cell that is being read. We provide a detailed statistical and experimental characterization of threshold voltage distribution of flash memory cells conditional upon the immediate-neighbor cell values, and show that such conditional distributions can be used to determine a set of read reference voltages that lead to error rates much lower than when a single set of reference voltage values based on the overall distribution are used. Based on our analyses, we propose a new method for correcting errors in a flash memory page, neighborcell assisted correction (NAC). The key idea is to re-read a flash memory page that fails error correction codes (ECC) with the set of read reference voltage values corresponding to the conditional threshold voltage distribution assuming a neighbor cell value and use the re-read values to correct the cells that have neighbors with that value. Our simulations show that NAC effectively improves flash memory lifetime by 33% while having no (at nominal lifetime) or very modest (less than 5% at extended lifetime) performance overhead.

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Using Data Postcompensation and Predistortion to Tolerate Cell-to-Cell Interference in MLC nand Flash Memory

Cited by 130 publications

References 23 publications

Program interference in MLC NAND flash memory: Characterization, modeling, and mitigation

Program interference in MLC NAND flash memory: Characterization, modeling, and mitigation

Constructions for constant-weight ICI-free codes

Neighbor-cell assisted error correction for MLC NAND flash memories

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