Using Data Dependencies to Improve Task-Based Scheduling Strategies on NUMA Architectures

Virouleau, Philippe; Broquedis, François; Gautier, Thierry; Rastello, Fabrice

doi:10.1007/978-3-319-43659-3_39

Cited by 22 publications

(20 citation statements)

References 14 publications

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“…Scheduling to improve data locality and minimizing NUMA effects in shared memory task parallel execution is an active research area [6,21,22,23,24,25,26,27] and can also be coupled to energy considerations [28,29]. : Left: A small task graph where all accesses (the type is indicated for each task) are assumed to be to the same shared data.…”

Section: Tracking Dependencies Through Data Versioningmentioning

confidence: 99%

DuctTeip: An efficient programming model for distributed task-based parallel computing

2019

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Current high-performance computer systems used for scientific computing typically combine shared memory computational nodes in a distributed memory environment. Extracting high performance from these complex systems requires tailored approaches. Task based parallel programming has been successful both in simplifying the programming and in exploiting the available hardware parallelism for shared memory systems. In this paper we focus on how to extend task parallel programming to distributed memory systems. We use a hierarchical decomposition of tasks and data in order to accommodate the different levels of hardware. We test the proposed programming model on two different applications, a Cholesky factorization, and a solver for the Shallow Water Equations. We also compare the performance of our implementation with that of other frameworks for distributed task parallel programming, and show that it is competitive. arXiv:1801.03578v1 [cs.DC] 10 Jan 2018 to the computational work performed by one node, the 1×9 process grid has the smallest variance between nodes, and therefore also the lowest maximum work size. The 9 × 1 process grid leads to smaller maximum work size than the 3 × 3 process grid if B is large enough, but suffers from significant load imbalance in the case B = 18. In all cases, the work becomes more evenly distributed if the number of level 1 tasks B is larger. The statistics for communication and computation point in different directions, but when comparing with actual run times, we have found that the communication size is the most informative measure. Having a large total communication size is likely to be detrimental to performance as the risk of tasks left waiting for remote data increases as well as the risk of congestion of messages. A square process grid is the factor that has the largest impact. Regarding the block sizes, having a large B improves the load balance, but increases the amount of communication as well as the number of messages (another indicator that is not shown in the graphics).

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Section: Tracking Dependencies Through Data Versioningmentioning

confidence: 99%

DuctTeip: An efficient programming model for distributed task-based parallel computing

2019

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“…Some of them are designed with memory migration heuristics or strategies to reduce remote memory access. Some target specific programming environments and runtime systems and reschedule application‐specific tasks to run on cores for load balancing on NUMA systems. Some adopt user‐level mechanisms, whereas most of them adopt kernel‐level mechanisms due to their efficiency in directly managing and allocating system resources.…”

Section: Technology Background and Related Workmentioning

confidence: 99%

“…To reduce remote memory access and/or resource contention, existing studies use various strategies. Most of them focus on either the scheduling techniques and thread mapping strategies or memory placement and data mapping policies.…”

Section: Introductionmentioning

confidence: 99%

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Memory‐aware kernel mechanism and policies for improving internode load balancing on NUMA systems

Chiang

et al. 2019

Softw Pract Exp

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Although nonuniform memory access architecture provides better scalability for multicore systems, cores accessing memory on remote nodes take longer than those accessing on local nodes. Remote memory access accompanied by contention for internode interconnection degrades performance. Properly mapping threads to cores and data accessed to their nodes can substantially improve performance and energy efficiency. However, an operating system kernel's load-balancing activity may migrate threads across nodes, which thus messes up the thread mapping. Besides, subsequent data mapping behavior pays for the cost of page migration to reduce remote memory access. Once unsuitable threads are migrated, it is detrimental to system performance. This paper focuses on improving the kernel's internode load balancing on nonuniform memory access systems. We develop a memory-aware kernel mechanism and policies to reduce remote memory access incurred by internode thread migration. The Linux kernel's load balancing mechanism is modified to incorporate selection policies in the internode thread migration, and the kernel is modified to track the amount of memory used by each thread on each node. With this information, well-designed policies can then choose suitable threads for internode migration. The purpose is to avoid migrating a thread that might incur relatively more remote memory access and page migration. The experimental results show that with our mechanism and the proposed selection policies, the system performance is substantially increased when compared with the unmodified Linux kernel that does not consider memory usage and always migrates the first-fit thread in the runqueue that can be migrated to the target central processing unit.

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“…Both approaches partition an initial subgraph containing the firstly created tasks but propagate this partition in different ways: RIP-DEP exploits information regarding the allocation of tasks' input data while RIP-MW repartitions the initial TDG subgraph as new tasks are added. • A complete performance evaluation of the proposed techniques against 3 other methods: an expert programmerdriven policy, a locality-unaware distributed first-in-first-out (DFIFO) approach and an implementation of a state-of-theart technique [17,18,42], dependency easy placement (DEP), that automatically schedules tasks depending on where their input and output data are allocated. Our evaluations consider 8 different OpenMP codes and 2 different parallel systems with up to 288 cores.…”

Section: Introductionmentioning

confidence: 99%

Reducing Data Movement on Large Shared Memory Systems by Exploiting Computation Dependencies

Barrera

Moretó

Ayguadé

et al. 2018

Proceedings of the 2018 International Conference on Supercomputing

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Shared memory systems are becoming increasingly complex as they typically integrate several storage devices. That brings different access latencies or bandwidth rates depending on the proximity between the cores where memory accesses are issued and the storage devices containing the requested data. In this context, techniques to manage and mitigate non-uniform memory access (NUMA) effects consist in migrating threads, memory pages or both and are generally applied by the system software. We propose techniques at the runtime system level to further mitigate the impact of NUMA effects on parallel applications' performance. We leverage runtime system metadata expressed in terms of a task dependency graph, where nodes are pieces of serial code and edges are control or data dependencies between them, to efficiently reduce data transfers. Our approach, based on graph partitioning, adds negligible overhead and is able to provide performance improvements up to 1.52× and average improvements of 1.12× with respect to the best state-of-the-art approach when deployed on a 288-core shared-memory system. Our approach reduces the coherence traffic by 2.28× on average with respect to the state-of-the-art. CCS CONCEPTS • Computing methodologies → Parallel computing methodologies; • Computer systems organization → Multicore architectures; • Mathematics of computing → Graph algorithms;

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Using Data Dependencies to Improve Task-Based Scheduling Strategies on NUMA Architectures

Cited by 22 publications

References 14 publications

DuctTeip: An efficient programming model for distributed task-based parallel computing

DuctTeip: An efficient programming model for distributed task-based parallel computing

Memory‐aware kernel mechanism and policies for improving internode load balancing on NUMA systems

Reducing Data Movement on Large Shared Memory Systems by Exploiting Computation Dependencies

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