2019
DOI: 10.1002/spe.2731
|View full text |Cite
|
Sign up to set email alerts
|

Memory‐aware kernel mechanism and policies for improving internode load balancing on NUMA systems

Abstract: Although nonuniform memory access architecture provides better scalability for multicore systems, cores accessing memory on remote nodes take longer than those accessing on local nodes. Remote memory access accompanied by contention for internode interconnection degrades performance. Properly mapping threads to cores and data accessed to their nodes can substantially improve performance and energy efficiency. However, an operating system kernel's load-balancing activity may migrate threads across nodes, which … Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1
1

Citation Types

0
15
0

Year Published

2020
2020
2024
2024

Publication Types

Select...
3
2

Relationship

1
4

Authors

Journals

citations
Cited by 5 publications
(15 citation statements)
references
References 23 publications
0
15
0
Order By: Relevance
“…A previous study [4] shows that it is better to select the task that involves less remote memory access after migration. The kernel-based Memory-aware Load Balancing (kMLB) mechanism was proposed to select suitable tasks to migrate between nodes to allow better load balancing in the Linux kernel.…”
Section: The Kernel-based Memory-aware Load Balancing (Kmlb) Mechanismmentioning
confidence: 99%
See 3 more Smart Citations
“…A previous study [4] shows that it is better to select the task that involves less remote memory access after migration. The kernel-based Memory-aware Load Balancing (kMLB) mechanism was proposed to select suitable tasks to migrate between nodes to allow better load balancing in the Linux kernel.…”
Section: The Kernel-based Memory-aware Load Balancing (Kmlb) Mechanismmentioning
confidence: 99%
“…This section first describes two types of multi-core systems and then reviews related work in Section 2.2. Section 2.3 introduces the kernel-based Memory-aware Load Balancing (kMLB) [4] mechanism and task selection policies proposed for improving inter-node migration.…”
Section: Technological Background and Related Workmentioning
confidence: 99%
See 2 more Smart Citations
“…Carrefour uses hardware counters to measure performance, and, according to the authors, it takes global decisions to migrate memory pages. Several works by Chiang et al 15‐17 use several kernel modifications to improve thread allocation, deal with memory congestion, and improve locality. They have obtained important improvements in performance with PARSEC 3.0 benchmarks.…”
Section: Related Workmentioning
confidence: 99%