Unveiling the parasitic electron channel under the gate of enhancement-mode p-channel GaN field-effect transistors on the p-GaN/AlGaN/GaN platform

Abstract

Enhancement-mode (E-mode) p-channel gallium nitride (GaN) field-effect transistors (p-FETs) are essential components for GaN-based complementary logic circuits. For the ease of integration with n-FETs, they could be fabricated on the commercial p-GaN gate high-electron-mobility-transistor (HEMT) platform, on which the two-dimensional electron gas at the AlGaN/GaN hetero-interface is completely depleted in as-grown epi-structures. However, under the gated region where p-GaN is recessed and depleted at thermal equilibrium, a parasitic electron channel (PEC) could appear at the AlGaN/GaN interface. This Letter reports experimental investigations on the PEC with specifically designed structures, confirming that the PEC does exist but imposes limited impacts on electrical characteristics of p-FETs. When connected with an external contact, the PEC could act as a back gate to modulate the overlaying p-channel. If isolated from external contacts, which is the case of p-FETs under normal operations, electrons in the PEC would redistribute under the active region of p-FETs in the horizontal direction (i.e., parallel to the surface) under different biases but are mostly confined near the AlGaN/GaN interface in the vertical direction (i.e., perpendicular to the surface).

A Novel Enhancement-Mode Gallium Nitride p-Channel Metal Insulator Semiconductor Field-Effect Transistor with a Buried Back Gate for Gallium Nitride Single-Chip Complementary Logic Circuits

“…The trench gate is employed to fully deplete the 2DHG to achieve E-mode operation, while a very thin p-GaN (i.e., 5 nm) remains to maintain a high hole mobility within the E-mode channel. Due to the removal of the top p-GaN cap, the buried 2DEG channel is regained beneath the trench gate, which is similar to what was experimentally demonstrated in [31]. Such a regained high-density 2DEG channel beneath the upper hole channel can be electrically connected with the top metal gate terminal through the "distribute-recessed via" and performs as a back gate.…”

Depletion- and Enhancement-Mode p-Channel MISHFET Based on GaN/AlGaN Single Heterostructures on Sapphire Substrates

“…Furthermore, p-GaN-gated HEMT structures, originally developed for high-power switches, have been most recently utilized to investigate p-channel devices [15][16][17][18][19][20]. The doubleheterostructure design typically results in the formation of a 2DEG below and a 2DHG above the Al(In)GaN barrier [3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20]40]. This can be advantageous for monolithic integration of n-and p-channel devices [6][7][8]20] on the same wafer, but it could also be an issue due to parasitic coupling of n-and pchannels, leakage at elevated temperature etc.…”

“…This can be advantageous for monolithic integration of n-and p-channel devices [6][7][8]20] on the same wafer, but it could also be an issue due to parasitic coupling of n-and pchannels, leakage at elevated temperature etc. [4,40]. Single GaN/AlN heterostructures, which contain only a 2DHG, are usually realized by molecular beam epitaxy (MBE) on singlecrystal AlN substrates or templates [21][22][23][24][25].…”

Impact of an Underlying 2DEG on the Performance of a p-Channel MOSFET in GaN

“…Several p-channel devices with polarization-induced two-dimensional hole gas (2DHG) at the heterointerface have been reported. − Similar to a 2DEG, the 2DHG has characteristics of high density and temperature independence . However, to achieve a GaN-based complementary metal-oxide-semiconductor (CMOS) technology, p-channel devices with high on-current, enhancement-mode (E-mode), and high on/off ratio are desired to be integrated with a related n-channel power device on the same platform. ,− Recently, due to the commercialization of E-mode p-GaN gate high electron mobility power transistors (HEMTs), p-channel MOSFETs (pFETs) with the same p-GaN/AlGaN/GaN-based epitaxial structure have attracted great interest. − Among them, E-mode pFETs with ( I ON / I OFF ) of 3 × 10 8 and a high threshold voltage ( V th ) of | – 2.2 V| were demonstrated . However, the improved on-current ( I ON ) of 18.5 mA/mm by 1.5 nm AlN spacer is still much lower than that of a generic E-mode n-channel device .…”