Universal quantum logic in hot silicon qubits

Abstract

Quantum computation requires many qubits that can be coherently controlled and coupled to each other [1]. Qubits that are defined using lithographic techniques are often argued to be promising platforms for scalability, since they can be implemented using semiconductor fabrication technology [2][3][4][5]. However, leading solidstate approaches function only at temperatures below 100 mK, where cooling power is extremely limited, and this severely impacts the perspective for practical quantum computation. Recent works on spins in silicon have shown steps towards a platform that can be operated at higher temperatures by demonstrating long spin lifetimes [6], gate-based spin readout [7], and coherent singlespin control [8], but the crucial two-qubit logic gate has been missing. Here we demonstrate that silicon quantum dots can have sufficient thermal robustness to enable the execution of a universal gate set above one Kelvin. We obtain singlequbit control via electron-spin-resonance (ESR) and readout using Pauli spin blockade. We show individual coherent control of two qubits and measure single-qubit fidelities up to 99.3 %. We demonstrate tunability of the exchange interaction between the two spins from 0.5 up to 18 MHz and use this to execute coherent two-qubit controlled rotations (CROT). The demonstration of 'hot' and universal quantum logic in a semiconductor platform paves the way for quantum integrated circuits hosting the quantum hardware and their control circuitry all on the same chip, providing a scalable approach towards practical quantum information.Spin qubits based on quantum dots are among the most promising candidates for large-scale quantum computation [2,9,10]. Quantum coherence can be maintained in these systems for extremely long times [11] by using isotopically enriched silicon ( 28 Si) as the host material [12]. This has enabled the demonstration of singlequbit control with fidelities exceeding 99.9% [13,14] and the execution of two-qubit logic [15][16][17][18]. The potential to build larger systems with quantum dots manifests in the ability to deterministically engineer and optimize qubit locations and interactions using a technology that greatly resembles today's complementary metal-oxide semiconductor (CMOS) manufacturing. Nonetheless, quantum error correction schemes predict that millions to billions of qubits will be needed for practical quantum informa-tion [19]. Considering that today's devices make use of more than one terminal per qubit [20], wiring up such large systems remains a formidable task. In order to avoid an interconnect bottleneck, quantum integrated circuits hosting the qubits and their electronic control on the same chip have been proposed [2,3,21]. While these architectures provide an elegant way to increase the qubit count to large numbers by leveraging the success of classical integrated circuits, a key question is whether the qubits will be robust against the thermal noise imposed by the power dissipation of the electronics. Demonstrating a universal gate set at elevat...

Exploiting a Single‐Crystal Environment to Minimize the Charge Noise on Qubits in Silicon

“…[ 6,7 ] Second, charge noise hinders spin‐cavity coupling through the charge degree of freedom, [ 9–11 ] posing a challenge for designing efficient long‐range interconnects between qubits. Finally, for two‐qubit gates where the coupling between two electron spin qubits is achieved via the exchange interaction with strength J , [ 3,12–18 ] the charge noise results in J fluctuations during the two‐qubit gate operation limiting the overall gate fidelity. [ 3,15,16,19 ]…”

“…The σ ε values are typically measured using a double quantum dot system, where the fluctuations in the detuning energy ϵ between the two dots result in observable dephasing of coherent exchange oscillations. [ 3,15,17,39–44 ] Due to the 1/ f nature of charge noise, the integrated charge noise σ ε is dominated by the low‐frequency noise components. Therefore, it is desirable to keep the total measurement time T M as short as possible because it is T M that determines the low‐frequency limit of the noise bandwidth f low = 1/ T M .…”

“…As a result, the total measurement time T M used to completely map, for example, a full Rabi oscillation is typically on the order of seconds to hours. [ 3,17,44 ] Unfortunately, the T M times for the integrated charge noise measurements reported in the literature are not standardized, which prevents a direct comparison of σ ε values across different research groups and between different material platforms. [ 3,19,36,40–45 ] Within this work, we present σ ε as a function of T M , which provides a practical measure of the magnitude of the charge noise, that takes into account the bandwidth of the noise measurements to allow a straightforward comparison between different material systems.…”

A Scalable Cryo-CMOS Controller for the Wideband Frequency-Multiplexed Control of Spin Qubits and Transmons

“…In this work, the focus is on the design of a controller operating at 3 K because of the higher available cooling power. This does not restrict a future co-integration with qubits at the same temperature as the electronics since "hot" qubits operating at temperatures above 1 K have recently been demonstrated and are likely to evolve further in the next few years [20], [21].…”

28-nm FD-SOI CMOS RF Figures of Merit Down to 4.2 K

“…The co-integration of the qubits and the peripheral electronics on the same substrate, the so-called quantum-integrated circuits, would be the following step in the quantum computing roadmap. Recent studies have already demonstrated silicon qubit operating above 1 K [4], [5]. With further engineering of qubits, it might be possible to increase the operating temperature of qubits to ~4.2 K, therefore having the whole system operating at that temperature.…”