Understanding software approaches for GPGPU reliability

Abstract

Even though graphics processors (GPUs) are becoming increasingly popular for general purpose computing, current (and likely near future) generations of GPUs do not provide hardware support for detecting soft/hard errors in computation logic or memory storage cells since graphics applications are inherently fault tolerant. As a result, if an error occurs in GPUs during program execution, the results could be silently corrupted, which is not acceptable for general purpose computations. To improve the fidelity of general purpose computation on GPUs (GPGPU), we investigate software approaches to perform redundant execution. In particular, we propose and study three different, application-level techniques. The first technique simply executes the GPU kernel program twice, and thus achieves roughly half of the throughput of a non-redundant execution. The next two techniques interleave redundant execution with the original code in different ways to take advantage of the parallelism between the original code and its redundant copy. Furthermore, we evaluate the benefits of providing hardware support, including ECC/parity protection to on-chip and off-chip memories, for each of the software techniques. Interestingly, our findings, based on six commonly used applications, indicate that the benefits of complex software approaches are both application and architecture dependent. The simple approach, which executes the kernel twice, is often sufficient and may even outperform the complex ones. Moreover, we argue that the cost is not justified to protect memories with ECC/parity bits.

GPU-Qin: A methodology for evaluating the error resilience of GPGPU applications

“…Dimitrov et al [24] proposed three approaches for GPGPU reliability that leverage both instruction-level parallelism and thread-level parallelism to replicate the application code. Their approach incurs performance overheads of 85 to 100%, and they conclude that understanding both the application characteristics and the hardware platform is necessary for efficient protection.…”

Cost-effective soft-error protection for SRAM-based structures in GPGPUs

“…Sheaffer et al [5] explore the concept of the sphere of replication on GPGPU processors, and present a hardware redundancy-based approach to create a reliable GPU with no performance loss. Dimitrov [8] investigate three software approaches to perform redundant execution for GPGPU reliability. Checkpointing is a widely used protection mechanism in CPU processors, it has been applied to enhance GPGPU robustness as well.…”

“…Soft error rate (SER) has been predicted to increase exponentially [6,7]. GPGPUs with hundreds of cores integrated into a single chip are prone to manifest high SER [8]. For examples, eight soft errors were observed in a 72-hour run of testing program on 60 NVIDIA GeForce 8800GTS 512 [9].…”

“…However, every parallel thread in GPGPU has statically allocated resources, including the register files and on-chip shared memory, making such opportunistic redundant multi-threading infeasible. It has been found that the software-based replication in GPGPU leads to high performance overhead if high fault coverage is desired [8]. Furthermore, methodologies that can be simply extended to GPGPUs fail to leverage the GPGPU microarchitecture characteristics in achieving the cost-effective fault-tolerance.…”

TH-1: China’s first petaflop supercomputer

“…In this case, the designer does not need to consider any fault-tolerance technique for GPU. But in the field of general-purpose computing, especially scientific computing, the reliability of the applications must be guaranteed [10].…”