Unbiased roughness measurements from low signal-to-noise ratio SEM images

Mack, Chris A.; Severi, Joren; Zidan, Mohamed; Simone, Danilo De; Lorusso, Gian

doi:10.1117/12.2614454

Cited by 6 publications

(5 citation statements)

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“…8 To mitigate pattern collapse, photoresists for high-NA EUV will have to be thinner than those used today with detrimental consequences on the local critical dimension uniformity, line edge/width roughness (LER/LWR), process window, 9 and on signal-to-noise ratio of scanning electron microscopy (SEM) image acquisition 10 and data extraction. 11 Consequently, great effort is being put into investigating and predicting thin photoresist films performance ahead of high-NA EUV. A variety of new approaches such as etch-litho synergy, 9 preprocessing and postprocessing holistic approach, 12 photoresist-underlayer matching, 8 complementary direct self-assembly, 13 and others, are being taken to this purpose.…”

Section: Introductionmentioning

confidence: 99%

“…This problem is not specific to high-NA EUV: when pitch shrinks, aspect ratio of photoresist patterns increases which in turn leads to higher collapse probability during development and rinse 8 . To mitigate pattern collapse, photoresists for high-NA EUV will have to be thinner than those used today with detrimental consequences on the local critical dimension uniformity, line edge/width roughness (LER/LWR), process window, 9 and on signal-to-noise ratio of scanning electron microscopy (SEM) image acquisition 10 and data extraction 11 . Consequently, great effort is being put into investigating and predicting thin photoresist films performance ahead of high-NA EUV.…”

Section: Introductionmentioning

confidence: 99%

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Scaling and readiness of underlayers for high-numerical aperture extreme ultraviolet lithography

Fallica

Simone

Chen

et al. 2022

J. Micro/Nanopattern. Mats. Metro.

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.With the introduction of high-numerical aperture (NA) extreme ultraviolet (EUV) lithography, the thickness of layers in the lithographic stack will scale owing to reduced depth of focus and etch budget. The consequence of thinning down underlayers for EUV lithography has been scarcely investigated. In here, we assessed the readiness of nine state-of-the-art underlayers, spin-on and dry deposited, in thickness series down to 4 nm nominal. Preliminarily, the coating quality of these underlayers was evaluated. Thickness uniformity across 300 mm wafer ranged from about ±0.5 nm to < ± 0.05 nm depending on the coating technique employed. Surface roughness of the underlayers varied from as much as 0.63 nm to as low as 0.062 nm but was not impacted by thickness scaling. Film density and total surface energy varied by <10 % with thickness. EUV lithography of dense lines/spaces arrays of pitch 28 nm was carried out using a positive tone chemically amplified photoresist. Dose-to-size and exposure latitude changed by < ± 5 % when thickness of underlayer was decreased. Failure free process was at most 1 nm smaller for thinner underlayer than it was for the thinnest version of each type. The unbiased linewidth roughness increased consistently but limitedly (<5 % ) when thinner underlayers were used, mainly due to a reduction in the correlation length. By calculating the power spectral density of the blanket underlayer we can pinpoint this effect to a reduction of correlation length of the underlayer own surface roughness. Finally, Z-factor calculations demonstrated that overall photoresist performance depended more significantly on the specific underlayer type (±12.6 % ) than it did on underlayer thickness (±8 % ). All these results indicate that most of underlayers investigated had limited impact on the properties as well as the patterning performance when scaling in view of high NA EUV.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Scaling and readiness of underlayers for high-numerical aperture extreme ultraviolet lithography

Fallica

Simone

Chen

et al. 2022

J. Micro/Nanopattern. Mats. Metro.

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“…Recently, the importance of the SEM image linescan signal-to-noise ratio (SNR) to the accurate unbiasing of the LWR has been demonstrated. 7,8 By studying roughness measurements of 32-nm pitch resist line/space patterns as a function of both resist thickness and number of frames of averaging in the CD-SEM, these papers showed that accurate unbiased roughness could be obtained under a variety of conditions so long as the linescan SNR was above about 2. While SNR above two is quite normal, for some thin resist conditions the SNR can be lower, making an unbiased roughness measurement difficult for these cases.…”

Section: Introductionmentioning

confidence: 99%

Unbiased roughness measurements from low signal-to-noise ratio scanning electron microscope images

Mack¹,

Severi

Zidan

et al. 2022

J. Micro/Nanopattern. Mats. Metro.

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Background: Measuring and subtracting scanning electron microscope (SEM) noise from a biased measurement of roughness leads to an unbiased roughness measurement. This unbiasing procedure becomes harder as the noise in the image increases. For low image signal-to-noise ratio (SNR) (below about 2), unbiased roughness measurement becomes less reliable.Aim: It is important to understand the mechanism for the sensitivity of unbiased roughness accuracy to linescan SNR to look for ways to improve unbiased roughness measurement for very noisy images.Approach: Using a combination of mathematical analysis, simulations, and experimental data, the role of pixel size and pitch in the SNR sensitivity are explored.Results: All evidence points to the correlation of edge detection noise to true edge position as the cause of the errors in unbiased roughness measurement for very noisy images. For small pitch patterns, changes in feature edge position caused by feature roughness will cause changes to the linescan slope, which in turn changes the sensitivity of edge detection to SEM image noise.Conclusions: Smaller pixel sizes and larger feature sizes are less sensitive to the SNR effects described here. For any algorithm used to measure unbiased roughness, the impact of linescan SNR must be carefully assessed.

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“…For each of the two CDSEM inspection steps, after block (BLK) etch and after dielectric etch (low k etch), a set of 35 pictures at fixed SEM scanning conditions (more details can be found in [5]), are taken at different locations of the line/space metrology structure to gather more statistics of each core CD and spacer condition. Then, we use a dedicated software, MetroLER© by Fractilia LLC [6], to extract the line and space CD for each core-and gap-defined structures, and different parameters are analyzed as a function of the exposure dose and the spacer thickness. Furthermore, the software allows to remove the systematic noise caused by the CDSEM tool, providing unbiased CD and roughness values, as well as defect count like line bridging and line breaks.…”

Section: Methodsmentioning

confidence: 99%

Extreme UV self-aligned double patterning process optimization for BEOL interconnections on 3nm nodes and beyond

Montero Alvarez,

Buccheri,

Lin

et al. 2024

Advanced Etch Technology and Process Integration for Nanopatterning XIII

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Microchip downscaling has been one of the main drivers on the semiconductor industry to enable faster, more efficient, and compact microchips, greatly broadening their range of applications, like the Internet of Things, smart mobility, artificial intelligence and 5G, among others. Aside from transistor scaling, the Back End of Line (BEOL) interconnection network, which transfers power and signals from and into the transistors, must also be scaled down consequently. The scaling requirements have surpassed the maximum resolution achievable by any lithographic technique by solely relying on direct printing. In the case of low numerical aperture, Extreme UV (low NA EUV), the most advanced, commercially available lithography technology, printing line/space structures below pitch 30 nm (P30) is extremely challenging [1]. However, 3nm and newer nodes require BEOL line space structures with P26 nm or narrower, in particular for the M2 layer. It is here where multipatterning techniques come into play. Self-Aligned multipatterning techniques allow to divide by a factor of two (double patterning, SADP), four (quadruple patterning, SAQP) or even eight (octuple patterning, SAOP) the pitch printed at lithography level, easing the lithography requirements [2]. However, with multipatterning, there comes a risk that not all interconnect lines would be patterned with equal dimensions, which would introduce resistance and capacitance variations across lines that theoretically should be equivalent. Hence, all multipatterning techniques require a precise control of each of the fabrication steps to guarantee that all lines and spaces present the same dimensions, i.e., a balanced patterning with no pitch walking.The target of our work is to find the fabrication parameters that lead to the lowest pitch walking, roughness and defectivity conditions on EUV SADP patterning (eSADP) at P21 nm structures with 10.5 nm metal line Critical Dimension (CD). Thus, we carried out a set of experiments where the printed lithography line CD and the spacer thickness values are swept on 300 mm silicon wafers. Then, we analyze the patterning performance at different stages of fabrication to see the evolution of line and space CDs, roughness and defectivity values to determine the best candidate for P21 nm eSADP patterning.

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Unbiased roughness measurements from low signal-to-noise ratio SEM images

Cited by 6 publications

References 0 publications

Scaling and readiness of underlayers for high-numerical aperture extreme ultraviolet lithography

Scaling and readiness of underlayers for high-numerical aperture extreme ultraviolet lithography

Unbiased roughness measurements from low signal-to-noise ratio scanning electron microscope images

Extreme UV self-aligned double patterning process optimization for BEOL interconnections on 3nm nodes and beyond

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