Ultrathin TiO_x Interface‐Mediated ZnO‐Nanowire Memristive Devices Emulating Synaptic Behaviors

Abstract

standard von Neumann architecture. [1][2][3][4][5] Among the different materials that have been developed, the study of synaptic devices based on 1D semiconductor nanomaterials is still very limited, with notable reports on carbon nanotubes, [6] Bi 1−x Sb x nanowires, [7] TiO 2 nanowires, [8] organic P 3 HT-polyethylene oxide coresheath nanowires, [9] etc. These studies form a solid foundation to the integration and assembly of 1D nanomaterials for large-scale neuromorphic computing application. However, due to their high surface-to-volume ratio, the electrical performance of semiconductor nanowire devices is strongly influenced by the nature of their surface. [10,11] Surface states of semiconductor nanowires, which are closely related to the morphology and sizes of nanowires, naturally exist due to dangling bonds or surface reconstruction of nanowires. Some surface defects or adsorbates can also lead to surface states on the nanowires. These surface states can produce randomly localized charges, which significantly affect the charge transport behavior, potentially causing band-bending between an electrode and the semiconductor nanowire or even pinning of the Fermi level. [10,12] These surface defects can cause variations of the contact behavior (i.e., Ohmic or Schottky), even for the same type of nanowire-electrode configuration. As a typical example, ZnO nanowires, which have been widely used in field effect transistors, [10,13,14] sensors, [15,16] photodetectors, [17,18] mersistors, [19][20][21] etc., have demonstrated contradictory contact behaviors on Au [22][23][24][25] and Ti [26,27] electrodes. Eliminating the effect of surface defects on semiconductor nanowire devices, especially the contact between electrodes and the nanowire is a major obstacle to achieving improved performance in these devices.In this research, we propose the introduction of an ultrathin metal oxide interfacial layer between Au electrodes and ZnO nanowires to minimize the electrical effect of surface defects on ZnO nanowires. An improved and symmetrical volatile threshold memristive behavior [28] is obtained which was further used to mimic some basic shortterm synaptic functionalities such as excitatory current response, paired-pulse facilitation and depression, and short-term plasticity, promising for neuromorphic computing applications. [29][30][31][32][33] One-dimensional semiconductor nanowires have been widely used as important building blocks in a number of devices. However, the performance of these devices is seriously hindered by the surface states/defects on the nanowires, which is a great obstacle to the realization of controllable and predictable characteristics. The introduction of an ultrathin metal oxide layer between Au electrodes and a ZnO nanowire is used to eliminate the surface effects of the nanowires, leading to improved volatile threshold switching performance. Study of the conduction mechanism demonstrates that the TiO x interfacial layer functions as a barrier between the electrodes and the nanowire, wherein th...

Threshold switching in nickel-doped zinc oxide based memristor for artificial sensory applications

“…Obviously, due to the symmetrical energy band diagram at both ends of the device, a similar charge transfer mechanism is expected at each electrode, leading to the observed symmetrical I-V sweeping behavior. 35,67…”

From Memristive Materials to Neural Networks

“…The TiO x ultrathin layer was utilized to eliminate the states/effects on the ZnO nanowire, resulting in excellent threshold resistive switching behaviors. 182 As shown in the diagram in Figure 8e, the TiO x layer acts as a barrier between the ZnO and electrode. Under low electrical field, the oxygen defects in TiO x provide trap sites inducing electron hopping as shown in phase I.…”

“…Therefore, the different trap energy level is responsible for the conductance evolution under external bias excitation. 182 Interfacial engineering is an effective strategy to improve the synaptic performances. Mohit Kumar et al inserted Ag nanowires (AgNWs) to the ZnO/Si interface, which significantly improved the synaptic behaviors.…”

Joining Technology Innovations at the Macro, Micro, and Nano Levels

“…The high energy of nanomaterials also enables room-temperature joining [37] for electronic packaging through self-generated heat [38] or ultra-dense atomic defect-motivated fast diffusion [39]. Aside from heat, the control of grain orientation [30], size [40], or interfacial stoichiometry [41] during the joining process could also be employed for the engineering of the high thermal conductivity, ultrahigh yield strength, or electron transportation efficiency of interfacial structures.…”