Ultrahigh Vacuum Annealing of Atomic-Layer-Deposited Y₂O₃/GaAs in Perfecting Heterostructural Chemical Bonding for Effective Passivation

Abstract

Direct deposition of high-dielectric-constant oxides on high-mobility semiconductors with low trap densities is the key to high-performance metal−oxide−semiconductor (MOS) devices. Atomic layer deposition (ALD) has been employed in precise thin oxide depositions with relatively low temperatures in the semiconductor device fabrication industry. Herein, we compare the electronic structures of nanometer-thick ALD-Y 2 O 3 on freshly grown GaAs(001)−4 × 6 without and with ultrahigh vacuum (UHV) annealing to 600 °C. In situ X-ray photoelectron spectroscopy (XPS) and in situ synchrotron radiation photoelectron spectroscopy (SRPES) with the best surface sensitivity were utilized to study the samples, whose pristine conditions were preserved under UHV between the growth and the characterization. In the Y 2 O 3 film, the surface Y−OH bonding and the pure As atoms resulting from the ALD process were completely removed with UHV annealing. Additionally, no O deficiency was detected in the resolution limit of XPS, indicating the intactness of the O−Y bonding. The UHV annealing has reduced traps in the Y 2 O 3 film, leading to smaller frequency dispersions in the measured capacitance−voltage (C−V) curves of the MOS capacitors (MOSCAPs). At the same time, the enriched Ga−O−Y bonds effectively passivated the GaAs surface and strongly stabilized the Y 2 O 3 /GaAs interface, resulting in lower interfacial trap density (D it ) values from (2−3) × 10 12 eV −1 cm −2 to (0.7−2) × 10 12 eV −1 cm −2 and maintaining the high-temperature stability. We have elucidated the effects of UHV annealing on the interfacial chemistry and the thin oxide film of the ALD-Y 2 O 3 /GaAs(001)−4 × 6 in an atomic scale, and have correlated the electronic characteristics of the heterostructure with the electrical properties of the MOSCAPs.

Enhanced Performance of GaAs Metal-Oxide-Semiconductor Capacitors Using a TaON/GeON Dual Interlayer

“…Among them, the GaAs-based MOS device has been considered as the most viable candidate due to its higher mobility, higher breakdown voltage, and larger band gap than Si [3]. Meanwhile, many high-k materials, e.g., HfO 2 [4], TiO 2 [5], La 2 O 3 [6], Y 2 O 3 [7], etc., have been introduced into GaAsbased MOS devices for the scaling down of the device dimension. However, since GaAs easily forms oxides of Ga and As that create interface defects and contain border traps, high interface-state density (D it ) at the interface of high-k/GaAs is generated, leading to the degradation of device performance [8].…”