Ultra Shallow Junction Formation Using Diffusion from Silicides: II . Diffusion in Silicides and Evaporation

Jiang, Han; Osburn, C. M.; Xiao, Zhiguang; McGuire, G. E.; Rozgonyi, G. A.; Patnaik, B.; Parikh, N.R.; Swanson, M. L.

doi:10.1149/1.2069171

Cited by 28 publications

(9 citation statements)

References 13 publications

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“…For SADS, the dopant will diffuse towards and segregate at the interface of NiSi/Si to modulate the SBHs during the drive-in annealing. Because of the low diffusion capability of boron in nickel silicide [12], not so much boron will reach the interface after the drive-in annealing process, which causes the tiny increase of SBHs in Fig.2 Fig.3 The modulation of SBHs with different implantation dosage.…”

Section: Resultsmentioning

confidence: 99%

Design consideration of ion implantation in dopant segregation technique at NiSi/Si interface

Guo

Huang

et al. 2010

2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology

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The impacts of drive-in annealing and ion implantation process have been experimentally analyzed for the dopant segregation method by silicide as diffusion source, which provides the design guidelines for the application of dopant segregation technique. The results illustrate that the silicide as diffusion source technique is more sensitive to the ion implantation process. By optimizing the post-implantation energy, Schottky diodes of NiSi/n-Si with large I on /I off ratio up to 10 9 have been fabricated. The extracted electron Schottky barrier height increases to 0.92eV, which means a relative low hole Schottky barrier height of about 0.2eV, which is suitable for Schottky barrier source/drain PMOS fabrication.

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Section: Resultsmentioning

confidence: 99%

Design consideration of ion implantation in dopant segregation technique at NiSi/Si interface

Guo

Huang

et al. 2010

2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology

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“…This is consistent with other reports that much more arsenic is evaporated compared with boron in CoSi 2 with annealing temperature, which can be explained by the fact that the activation energy for boron and arsenic evaporation from CoSi 2 is 4.4 and 2.0 eV, respectively. 15 Considering that the concentration of the p-well and n-well is 1 ϫ 10 17 cm Ϫ3 , the depths of the n ϩ and p ϩ junctions annealed at 900ЊC are about 100 and 130 nm from the silicide/silicon interface, respectively. From the Co depth profiles in Fig.…”

Section: Resultsmentioning

confidence: 99%

“…Silicides on Si substrates can agglomerate, resulting in rough and discontinuous films during annealing. 15 Agglomeration is driven by the reduction of surface and interface energies of the silicide and starts with grain boundary grooving at the intersection of silicide grain boundaries. 16,17 During agglomeration, metal atoms diffuse away from the silicide grain boundaries along with diffusion of Si to the silicide grain boundaries, especially in near noble metal silicides such as NiSi and CoSi 2 , where the metals have a high diffusivity compared to Si.…”

Section: Resultsmentioning

confidence: 99%

Simultaneous Formation of Shallow Junctions and Gate Doping for Dual Gate Structures Using Cobalt Silicone as a Dopant Source

Park¹,

Sohn²,

Bae³

et al. 1999

J. Electrochem. Soc.

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The fabrication of high performance dual gate complementary metal oxide semiconductor (CMOS) devices has been demonstrated by dopant implantation into a self‐aligned CoSi2 layer, followed by a single drive‐in annealing. By the optimization of poly‐crystalline Si (poly‐Si) gate thickness and drive‐in annealing conditions, it was shown that CMOS devices annealed at 900°C with gate poly‐Si of 200 nm thickness gives simultaneous formation of shallow junction and gate doping for both n‐channel MOS and p‐channel MOS with a single drive‐in annealing. CMOS devices fabricated with this technology exhibit good junction characteristics. In particular, there is no degradation from silicidation, implantation‐induced damage, gate dopant depletion, or boron penetration. Also, high reliability of the gate oxide and low sheet resistance of CoSi2 can be obtained. Therefore, it is suggested that simultaneous formation of shallow junction and gate doping using Co silicide as a dopant source is a promising technique for the fabrication of high performance dual gate CMOS devices. © 1999 The Electrochemical Society. All rights reserved.

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“…Clearly, the samples annealed with laser show a higher doping concentration at the silicide/silicon interface compared with the reference sample. Boron atoms redistribute and segregate to the silicide surface and silicide/silicon interface by diffusion in nickel silicide grain boundaries during silicidation [6]. The higher segregation doping in ELA sample is attributed to the difference in boron out-diffusion rate between the substitutional boron for the annealed sample and the interstitial boron for the asimplanted sample [7].…”

Section: Diodes and Materials Characterizationmentioning

confidence: 99%

Excimer laser-annealed dopant segregated Schottky (ELA-DSS) Si nanowire gate-all-around (GAA) pFET with near zero effective Schottky barrier height (SBH)

Chin

Pey

Singh

et al. 2009

2009 IEEE International Electron Devices Meeting (IEDM)

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We demonstrate excimer laser annealed dopant segregated Schottky (ELA-DSS) junction on gate-all-around (GAA) silicon nanowire pFETs. The metal-semiconductor junction interfacial doping is increased by two-fold with the ELA method. On silicon nanowire, the method achieves an effective Schottky barrier height (SBH) of nearly zero, improves the short channel performance and reduces the parasitic resistance of the fabricated devices, leading to an average improvement of 37% in I ON as compared to the devices fabricated without laser annealing.

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Ultra Shallow Junction Formation Using Diffusion from Silicides: II . Diffusion in Silicides and Evaporation

Cited by 28 publications

References 13 publications

Design consideration of ion implantation in dopant segregation technique at NiSi/Si interface

Design consideration of ion implantation in dopant segregation technique at NiSi/Si interface

Simultaneous Formation of Shallow Junctions and Gate Doping for Dual Gate Structures Using Cobalt Silicone as a Dopant Source

Excimer laser-annealed dopant segregated Schottky (ELA-DSS) Si nanowire gate-all-around (GAA) pFET with near zero effective Schottky barrier height (SBH)

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