Ultra-Low-Power Design and Hardware Security Using Emerging Technologies for Internet of Things

Yuan, J.S.; Lin, Jiunn-Yuan; Alasad, Qutaiba; Taheri, Shayan

doi:10.3390/electronics6030067

Cited by 24 publications

(9 citation statements)

References 127 publications

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“…[ 160 ] Additionally, an all‐spin logic device which utilized the variation in magnetization direction to change the circuit functionality without changing the overall device structure was also successfully demonstrated. [ 161 ] Other obfuscation techniques involving TFETs, [ 162 ] amorphous resistance change in PCM cells, [ 163 ] intrinsic stochasticity and polymorphism of giant spin‐Hall effect (GSHE) switches, [ 164 ] and ferroelectric active interconnects [ 165 ] have also been successful. More recently, independent from exploiting defects, obfuscation techniques based on 2D materials such as graphene, BP, and TMDs which rely on the intrinsic ambipolar transport and the substitutional doping of channel materials have been demonstrated.…”

Section: D‐material‐based Camouflagingmentioning

confidence: 99%

Hardware and Information Security Primitives Based on 2D Materials and Devices

Wali

Das

2023

Advanced Materials

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Hardware security is a major concern for the entire semiconductor ecosystem that accounts for billions of dollars in annual losses. Similarly, information security is a critical need for the rapidly proliferating edge devices that continuously collect and communicate a massive volume of data. While silicon‐based complementary metal‐oxide‐semiconductor technology offers security solutions, these are largely inadequate, inefficient, and often inconclusive, as well as resource intensive in time, energy, and cost, leading to tremendous room for innovation in this field. Furthermore, silicon‐based security primitives have shown vulnerability to machine learning (ML) attacks. In recent years, 2D materials such as graphene and transition metal dichalcogenides have been intensely explored to mitigate these security challenges. In this review, 2D‐materials‐based hardware security solutions such as camouflaging, true random number generation, watermarking, anticounterfeiting, physically unclonable functions, and logic locking of integrated circuits (ICs) are summarized with accompanying discussion on their reliability and resilience to ML attacks. In addition, the role of native defects in 2D materials in developing high entropy hardware security primitives is also examined. Finally, the existing challenges for 2D materials, which must be overcome for large‐scale deployment of 2D ICs to meet the security needs of the semiconductor industry, are discussed.

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Section: D‐material‐based Camouflagingmentioning

confidence: 99%

Hardware and Information Security Primitives Based on 2D Materials and Devices

Wali

Das

2023

Advanced Materials

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“…Even with a shift toward neuromorphic computing architectures, the security of everyday devices will remain a paramount concern. With increasing device connectivity and the advent of the IoT, most of these devices will communicate wirelessly through the Internet, where malicious adversaries can easily intercept communicated information due to advancements in computing power, machine learning attacks, etc . − However, for these devices to retain the desired energy efficiency of neuromorphic computing, similarly energy-efficient security approaches are necessary. For decades, physically unclonable functions (PUF) have been proposed as a promising solution to support secure and reliable security solutions in information security .…”

Section: Applicationsmentioning

confidence: 99%

Graphene and Beyond: Recent Advances in Two-Dimensional Materials Synthesis, Properties, and Devices

et al. 2022

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Since the isolation of graphene in 2004, two-dimensional (2D) materials research has rapidly evolved into an entire subdiscipline in the physical sciences with a wide range of emergent applications. The unique 2D structure offers an open canvas to tailor and functionalize 2D materials through layer number, defects, morphology, moirépattern, strain, and other control knobs. Through this review, we aim to highlight the most recent discoveries in the following topics: theoryguided synthesis for enhanced control of 2D morphologies, quality, yield, as well as insights toward novel 2D materials; defect engineering to control and understand the role of various defects, including in situ and ex situ methods; and properties and applications that are related to moiréengineering, strain engineering, and artificial intelligence. Finally, we also provide our perspective on the challenges and opportunities in this fascinating field.

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“…The DC power consumption for a supply voltage of 1.8 V equals around 8.3 µW per current branch, which becomes clearly a dominating factor, if two to three current branches need to be considered for a standard OTA. Two methods to relax the pramplifier speed specification are the extension of sampling phase ( [5], [10]), and the use of a parallel charge reservoir. Both methods affect power consumption and sample rate of the system.…”

Section: Design Limitationsmentioning

confidence: 99%

A 10.5µW programmable SAR ADC Frontend with SC Preamplifier for Low-Power IoT Sensor Nodes

Jotschke

Ossa

Reich

et al. 2020

2020 IEEE 6th World Forum on Internet of Things (WF-IoT)

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Massive deployment of wireless autonomous sensor nodes requires their lifetime extension and cost reduction. The analog frontend (AFE) plays a key role in this context. This paper presents a successive approximation register analog-to-digital converter (SAR ADC) with a switched-capacitor programmable gain switched preamplifier (SC PGSA), as a basic component of an integrated ultra-low power AFE. AFE resolution, sample rate and signal gain are configurable between 6 to 13 bit, 1 to 10 kS/s and -6 to 12 dB, respectively. The circuit draws 10.5 µW from a 1.8 V standard supply voltage, achieving an effective number of bits of 12.6 bit and a Walden figure of merit of 169.1 fJ/st. and 30.6 fJ/st., computed with and without preamplifier, respectively. The circuit is employed in a modular internet of things sensor node, suitable to be solely powered from microenergy sources (energy harvesters). In order to feed charge-scaling SAR ADC inputs with the sensor voltages, typically a preamplifier stage is implemented, which can create energy overhead of magnitudes larger than the ADC power. This paper presents a duty-cycled preamplifier with programmable gain for SAR ADCs, utilizing switched-capacitor switched-opamp technique in the SC PGSA. No additional buffer circuitry is needed to charge the SAR ADC, and the preamplifier design is relaxed in power constraint. The circuit targets the low-cost internet of things market. Cost efficiency is achieved by technology choice, wide configurability and shortened ASIC design cycles. The latter results from partly generated layout, easing reuse of circuit parts from a different CMOS node. A testchip in a low-cost 180 nm silicon-on-insulator technology was fabricated.

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Ultra-Low-Power Design and Hardware Security Using Emerging Technologies for Internet of Things

Cited by 24 publications

References 127 publications

Hardware and Information Security Primitives Based on 2D Materials and Devices

Hardware and Information Security Primitives Based on 2D Materials and Devices

Graphene and Beyond: Recent Advances in Two-Dimensional Materials Synthesis, Properties, and Devices

A 10.5µW programmable SAR ADC Frontend with SC Preamplifier for Low-Power IoT Sensor Nodes

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