1982 International Electron Devices Meeting 1982
DOI: 10.1109/iedm.1982.190212
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U-groove isolation technique for high speed bipolar VLSI's

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Cited by 23 publications
(8 citation statements)
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“…Isolation technology using silicon trenches is employed in high-speed bipolar integrated circuits (1,2) and in latchup-free CMOS devices (3). A high density MOS dynamic RAM cell utilizes trench sidewalls to increase storage capacitance (4).…”
Section: Introductionmentioning
confidence: 99%
“…Isolation technology using silicon trenches is employed in high-speed bipolar integrated circuits (1,2) and in latchup-free CMOS devices (3). A high density MOS dynamic RAM cell utilizes trench sidewalls to increase storage capacitance (4).…”
Section: Introductionmentioning
confidence: 99%
“…the segments in the opposit e direction by nRp and nRT, respectively. The total shift ntot, by which each segment is shifted, is the sum of four contributions ntot = net + nap -f nRT + nsp [1] where net is the etching rate of nonpassivated silicon by ion-assisted chemical etching, which is equal to zero on the surface passivated by deposited material, nRe is the redeposition rate of backscattered material from the discharge, nat is the redeposition rate of material originating in the trench, and nsp in the sputtering rate of redeposited material by physical ion bombardment. It is known that a redeposited material or a polymer layer can inhibit the chemical attack, and it is assumed that the passivated layer is attacked only by physical ion sputtering.…”
Section: Theoreticalmentioning
confidence: 99%
“…Nitride films are generally obtained by decomposition of silane and ammonia (1). These films are reported to be less efficient with respect to ionic contamination than phos-phosilicate glass (PSG) but are not responsible for dipole polarization effects.…”
Section: Introductionmentioning
confidence: 99%
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