[1992] Digest of Papers. FTCS-22: The Twenty-Second International Symposium on Fault-Tolerant Computing
DOI: 10.1109/ftcs.1992.243568
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Two software techniques for on-line error detection

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Cited by 77 publications
(23 citation statements)
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“…Several fault injection techniques have been proposed in the past decades; they can be categorized into simulationbased techniques [4] [5] [6] [7] [8], software-implemented techniques [9] [10] [11] [12], hardware-based techniques [13] [14] [15], and test port-based techniques [8] [12] [16] [17].…”
Section: Introductionmentioning
confidence: 99%
“…Several fault injection techniques have been proposed in the past decades; they can be categorized into simulationbased techniques [4] [5] [6] [7] [8], software-implemented techniques [9] [10] [11] [12], hardware-based techniques [13] [14] [15], and test port-based techniques [8] [12] [16] [17].…”
Section: Introductionmentioning
confidence: 99%
“…Also, simulation routines were developed [19] to accurately model single event upsets (SEUs) in CMOS SRAMS. Physical injection at the device level has included bombarding dynamic memories with alpha particles [24], a Zilog Z-80 with heavy ions and protons from a cyclotron [8], and a Motorola MC6809E with heavy ions from a ^^Californium source [16,25]. A useful summary of ion bombardment studies is found in [26].…”
Section: Recent Research In Fault Injectionmentioning
confidence: 99%
“…A useful summary of ion bombardment studies is found in [26]. Also, performance at the device level has been affected indirectly through power supply disturbances [25].…”
Section: Recent Research In Fault Injectionmentioning
confidence: 99%
“…Otros investigadores, en lugar de alterar los niveles de uno o más pines realizan breves conmutaciones en la fuente de alimentación [Damm 1986, Gunneflo 1990, Miremadi et al 1992. Esta técnica consiste en provocar fluctuaciones de tensión en la entrada de alimentación.…”
Section: Inyección De Fallos Externaunclassified
“…Una ventaja de esta técnica es poder producir fallos transitorios en puntos aleatorios internos del circuito integrado, normalmente fallos de tipo bit-flip (inversión del bit) individuales o múltiples. Sin embargo, uno de sus inconvenientes es la baja reproducibilidad de los fallos [Miremadi et al 1992, Miremadi y Torin 1995, Karlsson et al 1995.…”
Section: Inyección De Iones Pesadosunclassified