Abstract:Abstmct-We present a new scheduler, the two-dimenswnal round-robin (2DRR) scheduler, that provides high throughput and fair access in a packet switch that uses multiple input queues. We consider an architecture in which each input port maintains a separate queue for each output. In an .V x .V switch, our scheduler determines which of the queues in the total of .Y2 input queues are served during each time slot. We demonstrate the fairness properties of the 2DRR scheduler and compare its performance with that of… Show more
“…These facts allow significant cost reductions, since they eliminate the need for speedup and egress buffering. 2 Although advantageous, the buffered crossbar architecture was not very popular in products, due to the difficulty, in the past, to integrate large amounts of memory on the crossbar chip. With the progress of semiconductor technology, however, we are today at the point where enough buffer space can be placed on these chips.…”
Abstract-One of the most widely used architectures for packet switches is the crossbar. A special version of a it is the buffered crossbar, where small buffers are associated with the crosspoints. The advantages of this organization, when compared to the unbuffered architecture, is that it needs much simpler and slower scheduling circuits, while it can shape the switched traffic according to a given set of Quality of Service (QoS) criteria in a more efficient way. Furthermore, by supporting variable length packets throughout a buffered crossbar: a) there is no need for segmentation and reassembly circuits, b) no internal speedup is necessary, and c) synchronization between the input and output clock domains is simplified. In this paper we present an architecture, a hardware implementation analysis, and a performance evaluation of such a buffered crossbar. The proposed organization is simple, yet powerful and can be easily implemented using today's technologies. Our evaluation shows that it outperforms most of the existing packet switch architectures, while its hardware cost is kept to a minimum.
“…These facts allow significant cost reductions, since they eliminate the need for speedup and egress buffering. 2 Although advantageous, the buffered crossbar architecture was not very popular in products, due to the difficulty, in the past, to integrate large amounts of memory on the crossbar chip. With the progress of semiconductor technology, however, we are today at the point where enough buffer space can be placed on these chips.…”
Abstract-One of the most widely used architectures for packet switches is the crossbar. A special version of a it is the buffered crossbar, where small buffers are associated with the crosspoints. The advantages of this organization, when compared to the unbuffered architecture, is that it needs much simpler and slower scheduling circuits, while it can shape the switched traffic according to a given set of Quality of Service (QoS) criteria in a more efficient way. Furthermore, by supporting variable length packets throughout a buffered crossbar: a) there is no need for segmentation and reassembly circuits, b) no internal speedup is necessary, and c) synchronization between the input and output clock domains is simplified. In this paper we present an architecture, a hardware implementation analysis, and a performance evaluation of such a buffered crossbar. The proposed organization is simple, yet powerful and can be easily implemented using today's technologies. Our evaluation shows that it outperforms most of the existing packet switch architectures, while its hardware cost is kept to a minimum.
“…They are needed more the high speed packet switch scheduler for special use [5]. Richard presented the basic two Dimensional Round Robin (2DRR) scheduling algorithm [6]. The four matrixes, Request Matrix (RM), Pattern Matrix (PM), Scheduling Matrix (SM), and Allocation Matrix (AM) are used in the basic 2DRR.…”
Abstract:Recently, the need of the high speed packet switch is increased. The Re-2DRR scheduling algorithm based on 2DRR scheduling algorithm provides high throughput communication on a packet switch. However, computer network is using many cases, that huge data communication, complex, and other. This paper proposes a new method to increase choices in algorithm variation for three specific systems and more easily implementation than Re-2DRR. The effectiveness of the proposed algorithm is shown through simulation studies.
“…NPUT-QUEUED (IQ) switches with virtual output queueing (VOQ) buffering schemes [1]- [4] are today often adopted as the architecture for high-speed switches or routers, since all the components of an IQ switch (input interfaces, switching fabric, output interfaces) operate at a speed which is not larger than the data rate of input and output lines. Most of the implemented high-speed IQ switches internally operate on fixed-size data units (cells): the Lucent GRF [5], the Cisco GSR [6], the Tiny-Tera [7], the AN2/DEC [3], [8], the iPoint [9], and the MGR/BBN [10].…”
mentioning
confidence: 99%
“…Several SAs for IQ cell switches were proposed and compared in the literature (see, e.g., [2]- [4], [9], [11]- [16]). We call these cell-mode scheduling algorithms (CM-SAs).…”
Abstract-We consider input-queued switch architectures dealing at their interfaces with variable-size packets, but internally operating on fixed-size cells. Packets are segmented into cells at input ports, transferred through the switching fabric, and reassembled at output ports. Cell transfers are controlled by a scheduling algorithm, which operates in packet-mode: all cells belonging to the same packet are transferred from inputs to outputs without interruption. We prove that input-queued switches using packet-mode scheduling can achieve 100% throughput, and we show by simulation that, depending on the packet size distribution, packet-mode scheduling may provide advantages over cell-mode scheduling.Index Terms-Input queued switched, packet switching, scheduling algorithms, variable size packets.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.