TSV module optimization for high performance silicon interposer

Abstract

This paper presents Invensas' silicon interposer technology for heterogeneous chip integration. Various process module and integrated blocks were optimized for yield and high performance in the interposer. The modules under evaluation include TSV etch, barrier deposition, electrochemical plating, chemical mechanical polishing (CMP), temporary bonding, low temperature oxide (LTO) and low temperature polyimide (LTPI) passivation. IntroductionEach generation of semiconductor products from cellphones to servers is expected to be faster and more powerful than the previous one. Along with the everexpanding internet and widespread availability of portable devices, more computing power and functionality need to be available in small packages. The number of diverse chips inside these products is increasing rapidly and their integration within a small form factor is driving dense chip packaging technology, such as multi-chip modules (MCM), package on package (POP), package in package (PIP) and 3D integration.2.5D integration using a silicon interposer offers a way to achieve dense chip packaging with high performance interconnects for these applications. The benefits include smaller foot print, lower power consumption, and shorter delays. Silicon interposer can also reduce stress and warpage caused by CTE mismatch between chips and package substrate. Chips built with different process flows, such as logic memory, CMOS image sensor (CIS) and microelectro mechanical systems (MEMS) can be closely connected using the top routing layer of an interposer. Since chips are placed side by side on an interposer, this assembly method reduces the thermal issues of high-power 3D stacked dies.The market for 2.5D technology includes FPGA, ASIC, CPU, GPU, APU, high end memory and mobile applications. A number of companies are working on TSV interposer technology [1][2][3][4][5][6][7][8][9], and close to 80 million interposer based products are expected to be fabricated in 2014 [10]. Invensas is also developing technology for this growing market. There are many technical challenges in TSV interposer manufacturing. This paper describes our interposer test vehicle and our process optimization results.