Trends in DRAM dielectrics

Tang, Kai; Lau, W. S.; Samudra, Ganesh S.

doi:10.1109/101.589261

Cited by 31 publications

(12 citation statements)

References 43 publications

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“…The comparable leakage current for the ON and N2ONO dielectrics indicates that the inverse growth sequence of the oxide and nitride is a potential candidate as the DRAM storage dielectric. In fact, the storage dielectric was evolved from the initial ONO (oxide/nitride/oxide) to the current NO due to the required thinner equivalent oxide thickness to maintain the cell capacitance [14], with a low-pressure oxidation and appropriate treatment to enhance the nitride quality, the reliable ON structure becomes possible. Since there existed a 0.26-nm physical-oxide-thickness difference between the NO and the ON dielectric, the cell capacitance of the NO dielectric will be necessarily augmented by reducing the oxide thickness to the same level with that of the ON dielectric.…”

Section: Resultsmentioning

confidence: 99%

Oxide-Nitride Storage Dielectric Formation in a Single-Furnace Process for Trench DRAM

Chang²,

Wang³

et al. 2006

IEEE Electron Device Lett.

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Abstract-A simplified and integrated technique has been proposed to form an oxide/nitride storage dielectric in a single-furnace process by low-pressure oxidation and nitride film deposition with an extra N 2 O treatment for the trench dynamic random access memory (DRAM). Compared to the conventional nitride/oxide dielectric, this newly developed dielectric enjoys cellcapacitance-enhancement factor as high as 12.5% without degrading the leakage current and electron-trapping property. From the reliability test, the qualification for the DRAM application is also proven by the dielectric lifetime longer than 10-years. Most importantly, this technique can reduce the production cycle time without an additional equipment investment, which is essential in the cost-competitive DRAM arena.Index Terms-N 2 O treatment, oxide/nitride (ON) stack, singlefurnace process, storage dielectric, trench dynamic random access memory (DRAM).

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Section: Resultsmentioning

confidence: 99%

Oxide-Nitride Storage Dielectric Formation in a Single-Furnace Process for Trench DRAM

Chang²,

Wang³

et al. 2006

IEEE Electron Device Lett.

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“…[1][2][3] Consequently alternative materials with dielectric constants higher than silicon dioxide are currently widely investigated. 4,5 However, differences in bonding between many of these materials and silicon result in interfaces of poor quality, with high densities of interfacial defects that alter electrical properties. 6 For this reason it is believed that an ultrathin ͑Ͻ1 nm͒ buffer layer will generally be needed at the interface between Si and high-k materials to ensure reliability and performance.…”

Section: Introductionmentioning

confidence: 99%

Investigation of fluorine in dry ultrathin silicon oxides

Vereecke

Röhr

Carter

et al. 2001

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

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The origins of fluorine in dry ultrathin silicon oxides (<1 nm) were investigated as the incorporation of fluorine in these layers may improve their reliability and interface quality. Oxides were grown at room temperature (RT) by UV/O2 in an integrated tool combining vapor HF surface preparation and oxide growth in a single chamber. The chemical composition and thickness of the layers were characterized by x-ray photoelectron spectroscopy. It is shown that incorporation of fluorine in these oxides originated mainly from the contamination of the tool (dead spaces and surface adsorption) and from the fluorine left at the wafer surface by the in situ HF process. The levels of these sources of fluorine were about two orders of magnitude higher than from a wet HF dip. No evidence was found for the existence of subsurface fluorine [Kasi et al., Appl. Phys. Lett. 58, 2975 (1991)] as oxides grown in a separate noncontaminated cell (UV/O2, 1 atm O2, RT to 200 °C) did not show any significant increase in fluorine content as a function of oxide thickness. Hence the amount of fluorine incorporated into oxides grown in cluster tools under similar conditions will depend not only on the method selected for surface preparation but also on whether surface preparation and oxidation are performed in the same chamber or not. The possible benefits of determined fluorine levels are discussed.

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“…Earlier capacitor structures were based on Si 3 N 4 (dielectric constant ε r = 7) and SiO 2 (ε r = 3.9) such as ONO (oxide-nitride-oxide) and ON (oxide-nitride) capacitor structures [1]- [2]. Earlier capacitor structures were based on Si 3 N 4 (dielectric constant ε r = 7) and SiO 2 (ε r = 3.9) such as ONO (oxide-nitride-oxide) and ON (oxide-nitride) capacitor structures [1]- [2].…”

Section: Introductionmentioning

confidence: 99%

“…Earlier capacitor structures were based on Si 3 N 4 (dielectric constant ε r = 7) and SiO 2 (ε r = 3.9) such as ONO (oxide-nitride-oxide) and ON (oxide-nitride) capacitor structures [1]- [2]. It was predicted that, after tantalum oxide, ferroelectric materials such as SrTiO 3 (ε r = 200) or Ba x Sr 1-x TiO 3 (ε r = 400) may be necessary [2]. It was predicted that, after tantalum oxide, ferroelectric materials such as SrTiO 3 (ε r = 200) or Ba x Sr 1-x TiO 3 (ε r = 400) may be necessary [2].…”

Section: Introductionmentioning

confidence: 99%

Various Methods to Reduce Defect States in Tantalum Oxide Capacitors for DRAM Applications

et al. 2005

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Tantalum oxide has attracted world-wide interest for DRAM (dynamic random access memory) capacitor applications because of its relative high dielectric constant compared to silicon dioxide or nitride. We would like to point out that tantalum oxide behaves very much like a large bandgap n-type semiconductor with 3 main types of donors responsible for leakage current. Native oxygen vacancies are very deep double donors with Ec -Ed = 0.8 eV approximately, where Ec is the bottom of the conduction band and Ed is the energy level of the defect state. Si-O vacancy complexes are relatively shallow single donors with Ec -Ed = 0.2-0.4 eV. C-O vacancy complexes are relatively shallow single donors with Ec -Ed = 0.5-0.6 eV. The key points regarding how to suppress these 3 types of donor defects will be discussed for the purpose of leakage current reduction.

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Trends in DRAM dielectrics

Cited by 31 publications

References 43 publications

Oxide-Nitride Storage Dielectric Formation in a Single-Furnace Process for Trench DRAM

Oxide-Nitride Storage Dielectric Formation in a Single-Furnace Process for Trench DRAM

Investigation of fluorine in dry ultrathin silicon oxides

Various Methods to Reduce Defect States in Tantalum Oxide Capacitors for DRAM Applications

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