Transport in Nanoribbon Interconnects Obtained from Graphene Grown by Chemical Vapor Deposition

Abstract

ABSTRACT:We study graphene nanoribbon (GNR) interconnects obtained from graphene grown by chemical vapor deposition (CVD). We report low-and high-field electrical measurements over a wide temperature range, from 1.7 to 900 K. Room temperature mobilities range from 100 to 500 cm 2 V -1 s -1 , comparable to GNRs from exfoliated graphene, suggesting that bulk defects or grain boundaries play little role in devices smaller than the CVD graphene crystallite size. At high-field, peak current densities are limited by Joule heating, but a small amount of thermal engineering allows us to reach ~2 × 10 9 A/cm 2 , the highest reported for nanoscale CVD graphene interconnects. At temperatures below ~5 K, short GNRs act as quantum dots with dimensions comparable to their lengths, highlighting the role of metal contacts in limiting transport. Our study illustrates opportunities for CVD-grown GNRs, while revealing variability and contacts as remaining future challenges.

Theoretical analysis of high-field transport in graphene on a substrate

“…36 We can neglect lateral heat flow here, as the experimental sample 34 which is used to benchmark our simulations is significantly larger (4 × 7 μm) than the thermal healing length in graphene on 300 nm SiO2 (LH ~ 0.2 μm). 26,[37][38][39] Lateral heat sinking to the contacts is negligible in devices of length L ≫ 3LH. The temperature profiles of shorter or narrower devices can be treated through finite element simulations 37 or sometimes through analytical solutions.…”

“…The temperature profiles of shorter or narrower devices can be treated through finite element simulations 37 or sometimes through analytical solutions. 38,39 Combining all these mechanisms we arrive at a multi-scale physics model, which can be described with a set of equations:…”

“…However, in smaller, approximately sub-0.3 μm graphene devices the lateral heat spreading to the contacts also becomes important and must be included in a complete thermal analysis. 37,38 ) A thinner SiO2 corresponds to lower thermal resistance, better thermal grounding, less lattice heating and hence a higher vd. The velocity saturation is much weaker when the effective SiO2 thickness is less than 100 nm, and the high-field behavior for graphene supported by 30 nm of SiO2 (on Si) is very close to the perfect heat sinking case.…”

PMMA-Assisted Plasma Patterning of Graphene

“…Among the traditional methods are a metallic or resist mask to selectively protect graphene in plasma etch exposure [1][2][3][4][5] and focused ionbeam (FIB) etching [6,7]. In an oxygen plasma at 200 mTorr and 50 Watts, the etch rate of graphene is about 1 layer per second [8], and a 5-to 10-second plasma etch exposure is typically employed to selectively etch graphene with a hydrogen silsesquioxane (HSQ) resist [8] or metallic mask [9]. At a shorter time (<4 seconds) of plasma etch exposure, graphene oxide can be generated [10].…”

“…At a shorter time (<4 seconds) of plasma etch exposure, graphene oxide can be generated [10]. Major drawbacks of the traditional methods are the lack of adaptability of FIB for mass production of devices, the usage of harsh acid treatment to remove the HSQ resist [5] or metal mask [9,11], and overetching of graphene from the edges underneath the metallic ribbon mask [9]. With a HSQ ribbon mask, the resultant width of graphene ribbon pattern is ∼10 nm smaller than the resist mask [8].…”