Translating behavioral VHDL for emulation

Abstract

Emulation is widely used to increase simulation speed. The main problem is that to map it into hardware, the description of the model must be synthesizable. This is not difficult for modules described at lower abstraction levels but almost impossible for behavioral descriptions when using traditional synthesis approaches. In this paper, an overview is given how to use behavioral synthesis principles to convert behavioral VHDL constructs into synthesizable ones. Differences between translation for synthesis and emulation are outlined.

Architectural exploration tasks for on-chip embedded systems

“…For hardware, the term emulation refers to the use of special purpose hardware to emulate the behavior of a yet-to-be-build system [9]. Basically, emulation here is all about substituting the real hardware platform with another that is capable to run the so-called "foreign" design.…”