Transistor Concepts Based on Lateral Heterostructures of Metallic and Semiconducting Phases of MoS2

Abstract

In this paper we propose two transistor concepts based on lateral heterostructures of monolayer MoS2, composed of adjacent regions of 1T (metallic) and 2H (semiconducting) phases, inspired by recent research showing the possibility to obtain such heterostructures by electron beam irradiation. The first concept, the lateral heterostructure field-effect transistor, exhibits potential of better performance with respect to the foreseen evolution of CMOS technology, both for high performance and low power applications. Performance potential has been evaluated by means of detailed multi-scale materials and device simulations. The second concept, the planar barristor, also exhibits potential competitive performance with CMOS, and an improvement of orders of magnitude in terms of the main figures of merit with respect to the recently proposed vertical barristor.

Quantum engineering of transistors based on 2D materials heterostructures

“…4b) in TMD films is in the range from 1 to 4 nm for TMDs and of 20-100 nm for graphene, as extracted from mobility data of Fig. 4a, which is comparable to the channel or barrier region of a 2D heterostructure-based transistor [22][27] [24][31] [70]. This suggests that transport will be dominated by the quality of the lateral heterojunctions, which are, however, still insufficiently controlled and understood.…”

“…In vertical [22][27] [24] and lateral [28][30] [31][32] [70] heterostructure FETs, the channel consists of a material with a larger gap than that used in the source and drain regions. In both cases, the voltage applied to the top gate modulates the energy barrier height and therefore the current.…”

“…In vertical [23] and lateral [70] barristors, the Schottky barrier height between a semimetal source with a low density of states (e.g., graphene) and a semiconductor drain is modulated by the top gate voltage, thus modulating the thermionic current. In the case of the graphene base transistor [25] [26], the barrier between source and drain is represented by a graphene sheet sandwiched between two insulator or semiconducting layers.…”

Recent Advances in Low‐Dimensional Heterojunction‐Based Tunnel Field Effect Transistors

“…Next, we choose the U (k) using some deliberate strategies to minimize the spatial spreads of the Wannier functions. [151] They declared that attentions should be paid to the off-diagonal elements con-necting the two different materials and used the off-diagonal elements of the MoS 2 -2H's in the interface (Figure 10d). This procedure is called the maximally localized Wannier functions (MLWFs) method.…”

Spin-valley system in a gated MoS2-monolayer quantum dot

“…Transistor structures with TMDC monolayer forming active area in tunnel FETs are being developed [25], also with vertical TMDCs heterostructures [26,27]. The more intriguing lateral, in-plane TMDCs heterojunctions are also constructed, enabling interesting 1D physics at interfaces [28], or leading to improved FETs switching characteristics [29][30][31].…”