Transformer based dual-power-mode CMOS power amplifier for handset applications

Cho, Yunsung; Park, Byungjoon; Jin, Sangsu; Kim, Jooseung; Moon, Kibong; Kang, Daehyun; Jin, Hyun-Tak; Koo, Seungbeom; Kim, Bumman

doi:10.1109/eumic.2014.6997886

Cited by 7 publications

(2 citation statements)

References 14 publications

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“…This approach could be realized using the inductance induced by bond-wires. 3,4 The multi-gate transistor (MGTR) technique also effectively addresses IMD3 by minimizing the g m3 value of a single stage power amplifier. 5,6 The MGTR consists of a main transistor and an auxiliary transistor as shown in Figure 1B.…”

Section: Introductionmentioning

confidence: 99%

“…The technique suppresses the second harmonic that generates the IMD3 through inter‐ and re‐modulation processes. This approach could be realized using the inductance induced by bond‐wires 3,4 . The multi‐gate transistor (MGTR) technique also effectively addresses IMD3 by minimizing the g m3 value of a single stage power amplifier 5,6 .…”

Section: Introductionmentioning

confidence: 99%

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A linearization method with optimizing impedance of envelope signal to suppress IMD3 of RF CMOS power amplifier

Lee

Yoo

Park

2020

Micro & Optical Tech Letters

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In this paper, the linearization method with optimization of the impedance of the envelope signal of a RF CMOS power amplifier is proposed. By analyzing the extended Taylor series, it was determined that the IMD3, gain, and output power of the CMOS power amplifier could be regulated using the impedance of the envelope signal. To evaluate the feasibility of the proposed method, we designed a 1.9-GHz CMOS power amplifier using a 110-nm RFCMOS process. Using the proposed method, the measured IMD3 is suppressed and consequently, the measured linear output power is also improved by 3.7 dB. The measured results confirm the feasibility of the presented approach.

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