Trade-Off Strategies in Designing Capacitor Voltage Balancing Schemes for Modular Multilevel Converter HVDC

Abstract

-This paper focuses on the engineering trade-offs in designing capacitor voltage balancing schemes for modular multilevel converters (MMC) HVDC: regulation performance and switching loss. MMC is driven by the on/off switch operation of numerous submodules and the key design concern is balancing submodule capacitor voltages minimizing switching transition among submodules because it represents the voltage regulation performance and system loss. This paper first introduces the state-ofthe-art MMC-HVDC submodule capacitor voltage balancing methods reported in the literatures and discusses the trade-offs in designing these methods for HVDC application. This paper further proposes a submodule capacitor balancing scheme exploiting a control signal to flexibly interchange between the on-state and the off-state submodules. The proposed scheme enables desired performance-based voltage regulation and avoids unnecessary switching transitions among submodules, consequently reducing the switching loss. The flexibility and controllability particularly fit in high-level MMC HVDC applications where the aforementioned design trade-offs become more crucial. Simulation studies for MMC HVDC are performed to demonstrate the validity and effectiveness of the proposed capacitor voltage balancing algorithm.

Design Procedure of MMC-HVDC System: Comprehensive Consideration of Internal and External Dynamics

“…Conversely, a voltage balancing algorithm for the voltage ripple could aggravate the voltage ripple, which would cause a forced ripple. Therefore, the required voltage ripple factor is associated with switching frequency depending on the MMC system loss, which should be examined with a specific switching principle adopted by the MMC developer and designed with the loss evaluation in the design step (Step 10) of the design process [46], [48], [49], [59], [60]. In this paper, the SM capacitance is only validated for analysis in whether stable operating point or not under the full-sorting algorithm.…”

“…System losses consists of the power losses on passive elements (interface transformers, lines, connection points, DC cables) and power conversion elements (active device). The system loss evaluation in this paper focuses on switching loss highly related to the SM capacitance with the voltage ripple factor that limits the switching frequency and various capacitor voltage sorting algorithms [59], [60]. The voltage fluctuation of the SM capacitor is determined by a natural voltage ripple and a forced voltage ripple.…”

“…Finally, the switching frequency that can satisfy the system loss can be determined. Since this study was extensively scrutinized by previous studies [57], [59], [60], only the verification is conducted with an assumption that a required MMC-HVDC system adopts the passive mode redundancy method in this paper.…”