Towards Trojan-Free Trusted ICs: Problem Analysis and Detection Scheme

Wolff,; Papachristou,; Bhunia,; Chakraborty, Samarjit

doi:10.1109/date.2008.4484928

Cited by 151 publications

(146 citation statements)

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“…The proposed methodology is conceptually similar to N-detect test [5,6] used in stuck-at ATPG (automatic test pattern generation), where test set is generated to detect each single stuck-at fault in a circuit by at least N different patterns, in the process improving test quality and defect coverage [6]. In this paper, we focus on digital Trojans [13], which can be inserted into a design either in a design house (e.g. by untrusted CAD tool or IP) or in a foundry.…”

Section: Introductionmentioning

confidence: 99%

“…An intelligent adversary will try to hide such tampering of IC's functional behavior in a way that makes it extremely difficult to detect with conventional post-manufacturing test [3]. Intuitively, it means that the adversary would ensure that such a tampering is manifested or triggered under very rare conditions at the internal nodes, which are unlikely to arise during test but can occur during long hours of field operation [13]. Fig.…”

Section: Introductionmentioning

confidence: 99%

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MERO: A Statistical Approach for Hardware Trojan Detection

Chakraborty

Wolff

Sauseng

et al. 2009

Lecture Notes in Computer Science

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154

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Abstract. In order to ensure trusted in-field operation of integrated circuits, it is important to develop efficient low-cost techniques to detect malicious tampering (also referred to as Hardware Trojan) that causes undesired change in functional behavior. Conventional postmanufacturing testing, test generation algorithms and test coverage metrics cannot be readily extended to hardware Trojan detection. In this paper, we propose a test pattern generation technique based on multiple excitation of rare logic conditions at internal nodes. Such a statistical approach maximizes the probability of inserted Trojans getting triggered and detected by logic testing, while drastically reducing the number of vectors compared to a weighted random pattern based test generation. Moreover, the proposed test generation approach can be effective towards increasing the sensitivity of Trojan detection in existing side-channel approaches that monitor the impact of a Trojan circuit on power or current signature. Simulation results for a set of ISCAS benchmarks show that the proposed test generation approach can achieve comparable or better Trojan detection coverage with about 85% reduction in test length on average over random patterns.

show abstract

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

MERO: A Statistical Approach for Hardware Trojan Detection

Chakraborty

Wolff

Sauseng

et al. 2009

Lecture Notes in Computer Science

Self Cite

310

154

View full text Add to dashboard Cite

show abstract

“…Wolff et al analyzed rare-net combinations in designs. 6 These rarely activated nets are used as Trojan triggers. At the same time, nets with low observability are used as payloads (see Figure 7).…”

Section: Trojan Activation Methodsmentioning

confidence: 99%

“…Wang, Tehranipoor, and Plusquellic developed the first detailed taxonomy for hardware Trojans 5 (a simple taxonomy devised earlier differentiated between payload activation logic and triggering 6 ). This comprehensive taxonomy lets researchers examine their methods against different Trojan types.…”

Section: Trojan Design and Taxonomymentioning

confidence: 99%