2015 IEEE 6th Latin American Symposium on Circuits &Amp; Systems (LASCAS) 2015
DOI: 10.1109/lascas.2015.7250458
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Towards reversible QCA computers: Reversible gates and ALU

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Cited by 22 publications
(19 citation statements)
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“…In addition to that the reduction of cell count, covered area, and total clock cycles by 39%, 28% & 33% respectively is achieved as compared to the design in [35]. Also, the proposed design is superior in comparison with the design in [36] in terms of 4% less cell count, 4% less covered area, and 60% reduction in clock cycles.…”
Section: Simulation Resultsmentioning
confidence: 79%
“…In addition to that the reduction of cell count, covered area, and total clock cycles by 39%, 28% & 33% respectively is achieved as compared to the design in [35]. Also, the proposed design is superior in comparison with the design in [36] in terms of 4% less cell count, 4% less covered area, and 60% reduction in clock cycles.…”
Section: Simulation Resultsmentioning
confidence: 79%
“…The USE clocking scheme enables feedback paths with small or large loops and allows for routing simplification due to its flexibility. Recently, numerous studies on reversible QCA designs have been conducted [16,17].…”
Section: Fig 1 Qca Cell Polarizationmentioning
confidence: 99%
“…In [25] In the research paper [33], a fault-tolerant QCA-based ALU with seven layers is described with power e ciency. A 3X3 modi ed TSG gate is employed to decrease the area and delay.…”
Section: Literature Reviewmentioning
confidence: 99%