Towards Real-Time Monitoring of Thermal Peaks in Systems-on-Chip (SoC)

Oukaira, Aziz; Hassan, Ahmad; Ali, Mohamed; Savaria, Yvon; Lakhssassi, Ahmed

doi:10.3390/s22155904

Cited by 10 publications

(4 citation statements)

References 19 publications

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“…Now we can calculate the temperature gradient along a known distance as given by [37] and shown in Equation (6). For more details about GDS, please refer to [34,35,37].…”

Section: Description Of the Gds Techniquementioning

confidence: 99%

“…The GDS method is based on the detection of isotherms using two cells, and it has been successfully applied in [34,35] to detect a single heat source in the IC. From a theoretical point of view, the authors do not discuss the influence of parameters H and R on the accuracy of the method.…”

Section: Description Of the Gds Techniquementioning

confidence: 99%

“…Moreover, the proposed approach can only find the right location when the workload is fixed, which is not practical. In [34,35], the gradient direction sensor (GDS) technique was used to detect overheating spots on FPGAs; however, the authors did not address the problem of multiple overheating spots.…”

Section: Introductionmentioning

confidence: 99%

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Accurate On-Chip Thermal Peak Detection Based on Heuristic Algorithms and Embedded Temperature Sensors

et al. 2023

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The reliability and lifetime of systems-on-chip (SoCs) are being seriously threatened by thermal issues. In modern SoCs, dynamic thermal management (DTM) uses the thermal data captured by thermal sensors to constantly track the hot spots and thermal peak locations in real time. Estimating peak temperatures and the location of these peaks can play a crucial role for DTM systems, as temperature underestimation can cause SoCs to fail and have shortened lifetime. In this paper, a novel sensor allocation algorithm (called thermal gradient tracker, TGT), based on the recursive elimination of regions that likely do not contain any thermal peaks, is proposed for determining regions that potentially contain thermal peaks. Then, based on an empirical source temperature detection technique called GDS (gradient direction sensor), a hybrid algorithm for detecting the position and temperature of thermal peaks is also proposed to increase the accuracy of temperature sensing while trying to keep the number of thermal sensors to a minimum. The essential parameters, H and R, of the GDS technique are determined using an automated search algorithm based on simulated annealing. The proposed algorithm has been applied in a system-on-chip (SoC) in which four heat sources are present, and for temperatures ranging between 45 °C and 115 °C, in a chip area equal to 25 mm2. The simulation results show that our proposed sensor allocation scheme can detect on-chip peaks with a maximum error of 1.48 °C and an average maximum error of 0.49 °C by using 15 thermal sensors.

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“…Now we can calculate the temperature gradient along a known distance as given by [37] and shown in Equation (6). For more details about GDS, please refer to [34,35,37].…”

Section: Description Of the Gds Techniquementioning

confidence: 99%

Section: Description Of the Gds Techniquementioning

confidence: 99%

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Accurate On-Chip Thermal Peak Detection Based on Heuristic Algorithms and Embedded Temperature Sensors

et al. 2023

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“…However, as packing densities increase, effectively managing heat dissipation between SiP chips and addressing the self-heating of individual chips becomes vital. This is crucial due to the adverse effects high temperatures can have on performance and reliability [9][10][11][12]. Therefore, researchers and electronic developers have turned their attention to thermal management problems in SiP implementations.…”

Section: Introductionmentioning

confidence: 99%

Advanced Thermal Control Using Chip Cooling Laminate Chip (CCLC) with Finite Element Method for System-in-Package (SiP) Technology

et al. 2023

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This paper introduces a novel approach to address thermal management challenges in system-in-package (SiP) technology, which is a significant concern in various advanced technologies. The main objective is to assess the electrical and thermal performance of the SiP model by utilizing Chip Cooling Laminate Chip (CCLC) technology. To achieve this, we employed finite element method (FEM) analysis using COMSOL Multiphysics® and MATLAB® to compare the results of electrical and thermal SiP models with and without CCLC technology. The numerical simulations revealed that, as opposed to the traditional model, the temperature variation decreased significantly with a uniform temperature distribution when employing the CCLC technology. Additionally, the thermal conduction performance of the packaging system using CCLC demonstrated remarkable reliability and resolution with cost-effective micro-devices, particularly in micro-medicine applications. The analysis of the electrical and thermal models reported a maximum error between them of 1.15 ∘C.

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Thermal camera for System-in-Package (SiP) technology: Transient thermal analysis based on FPGA and Finite Element Method (FEM)

Oukaira,

Said,

Mellal

et al. 2023

AEU - International Journal of Electronics and Communications

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Towards Real-Time Monitoring of Thermal Peaks in Systems-on-Chip (SoC)

Cited by 10 publications

References 19 publications

Accurate On-Chip Thermal Peak Detection Based on Heuristic Algorithms and Embedded Temperature Sensors

Accurate On-Chip Thermal Peak Detection Based on Heuristic Algorithms and Embedded Temperature Sensors

Advanced Thermal Control Using Chip Cooling Laminate Chip (CCLC) with Finite Element Method for System-in-Package (SiP) Technology

Thermal camera for System-in-Package (SiP) technology: Transient thermal analysis based on FPGA and Finite Element Method (FEM)

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