Advanced Thermal Control Using Chip Cooling Laminate Chip (CCLC) with Finite Element Method for System-in-Package (SiP) Technology

Abstract

This paper introduces a novel approach to address thermal management challenges in system-in-package (SiP) technology, which is a significant concern in various advanced technologies. The main objective is to assess the electrical and thermal performance of the SiP model by utilizing Chip Cooling Laminate Chip (CCLC) technology. To achieve this, we employed finite element method (FEM) analysis using COMSOL Multiphysics® and MATLAB® to compare the results of electrical and thermal SiP models with and without CCLC technology. The numerical simulations revealed that, as opposed to the traditional model, the temperature variation decreased significantly with a uniform temperature distribution when employing the CCLC technology. Additionally, the thermal conduction performance of the packaging system using CCLC demonstrated remarkable reliability and resolution with cost-effective micro-devices, particularly in micro-medicine applications. The analysis of the electrical and thermal models reported a maximum error between them of 1.15 ∘C.

Design and Simulation of a System-in-Package Chip for Combined Navigation

“…The signal path between chips needs to be high-speed and low-noise, while the power plane needs to provide stable voltage and sufficient current. In addition, microsystems need good heat dissipation to avoid performance degradation and failures caused by high temperatures [20][21][22][23]. Temperature causes thermal stress, and temperature mismatch is the main cause of the warping of microsystem structures [24].…”