IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004.
DOI: 10.1109/iccad.2004.1382573
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Towards formal verification of analog designs

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Cited by 72 publications
(64 citation statements)
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“…Consider a tunnel-diode oscillator circuit [8]. It models the current I and the voltage drop V of a tunnel diode in parallel to the capacitor of a serial RLC circuit, which are in stable oscillation for the given parameters.…”
Section: Example: Tunnel-diode Oscillator Circuitmentioning
confidence: 99%
See 1 more Smart Citation
“…Consider a tunnel-diode oscillator circuit [8]. It models the current I and the voltage drop V of a tunnel diode in parallel to the capacitor of a serial RLC circuit, which are in stable oscillation for the given parameters.…”
Section: Example: Tunnel-diode Oscillator Circuitmentioning
confidence: 99%
“…We propose methods to simplify polyhedra by limiting both the number of bits and contraints. The applicability of PHAVer and the effectiveness of the proposed methods are demonstrated with a navigation benchmark [7], and a tunnel diode circuit [8]. In addition to the reachability algorithm, PHAVer includes a separate engine for computing simulation relations between hybrid automata.…”
Section: Introductionmentioning
confidence: 99%
“…5a, which has been used by many researchers (e.g., [19,21]) as a benchmark, will be used as an example throughout the paper to demonstrate each step of our methodology. The tunnel diodes exploit a phenomenon called resonant tunneling due to its negative resistance characteristic at very low forward bias voltages.…”
Section: Examplementioning
confidence: 99%
“…Variant approaches of the latter analysis were proposed. For instance, the model checking tools d/dt [18], Checkmate [19], and PHaver [20] were adapted and used in the verification of a biquad low-pass filter [18], a tunnel diode oscillator and a modulator [19], and voltage controlled oscillators [20]. In [21], the authors used intervals to construct the abstract state space, while using heuristics to identify possible transition between adjacent regions.…”
Section: B Analog Design Verificationmentioning
confidence: 99%
“…This approach has been extended to verify timing properties of analog circuits in [8]. In [9], analog circuits were verified using the tool CheckMate, which computes an abstract transition relation between user-defined regions of the state space using polyhedral enclosures of the continuous trajectories. The tool named d/dt computes reachability by discrete-time integration over polyhedral sets of states, applied to analog circuits in [3].…”
Section: Introductionmentioning
confidence: 99%