Verifying analog oscillator circuits using forward/backward abstraction refinement

This is the accepted version of the paper.This version of the publication may differ from the final published version. Abstract-We present a novel mixed time and frequency domain approach to the formal verification of oscillators properties which are specified in the frequency domain. We use robust periodogram specification to specify the oscillator behaviour in the close vicinity of the limit cycle. Using SAT modulo ODE (SMO) for Bounded Model Checking (BMC) of the non-linear hybrid automata, we show that the oscillator hybrid timed traces satisfy frequency domain specifications. Permanent

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“…Based on the non-linear diode and PMOS models in [10], [11], we got the non-linear hybrid automatons of TDO and VCO Fig. 2.…”

Section: B Resultsmentioning

confidence: 99%

“…Mathematical model of VCO is given in Eqs. 8, 9, 10, where I DS (V GS , V DS ) is the SchichmanHodges PMOS model [11]. For TDO we have used parameters, C = 1nF ± 2%, L = 1mH ± 2%, R = 0.2Ohm and V in ∈ …”

Section: A Evaluation Methodologymentioning

confidence: 99%

Verifying robust frequency domain properties of non linear oscillators using SMT

Asad

Jones

Surre

2014

17th International Symposium on Design and Diagnostics of Electronic Circuits &Amp; Systems

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“…Variant approaches of the latter analysis were proposed. For instance, the model checking tools d/dt [18], Checkmate [19], and PHaver [20] were adapted and used in the verification of a biquad low-pass filter [18], a tunnel diode oscillator and a modulator [19], and voltage controlled oscillators [20]. In [21], the authors used intervals to construct the abstract state space, while using heuristics to identify possible transition between adjacent regions.…”

Section: B Analog Design Verificationmentioning

confidence: 99%

Integrating Abstraction Techniques for Formal Verification of Analog Designs

Zaki

Denman

Tahar

et al. 2009

Journal of Aerospace Computing, Information, and Communication

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The verification of analog designs is a challenging and exhaustive task that requires deep understanding of physical behaviors. In this paper, we propose a qualitative-based predicate abstraction method for the verification of a class of nonlinear analog circuits. In the proposed method, system equations are automatically extracted from a circuit diagram by means of a bond graph. Verification is applied based on combining techniques from constraint solving and computer algebra along with symbolic model checking. Our methodology has the advantage of avoiding exhaustive simulation normally encountered in the verification of analog designs. To this end, we have used Dymola, Hsolver, SMV, and Mathematica to implement the verification flow. We illustrate the methodology on several analog examples including Colpitts and tunnel diode oscillators.

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“…Such method is able to detect the errors hidden in circuit design [6]. Labeled Hybrid Petri Net (LHPN) is developed for formal verification of AMS design [7]. LHPN outperforms pervious methods in that previous ones mostly require the designers to master hybrid automaton or hybrid Petri Net for AMS description, and they does not necessarily follow the rigid Hardware Description Language requirements; with LHPN, the designers can describe the AMS circuits of interest using their familiar language therefore LHPN becomes more popular and universal.…”

Section: Introductionmentioning

confidence: 99%