Towards an efficient hardware implementation of recurrent neural network based multiuser detection

et al. 2016

J Sign Process Syst

Despite the progress made in digital signal processing during the last decades, the constraints imposed by high data rate communications are becoming ever more stringent. Moreover mobile communications raised the importance of power consumption for sophisticated algorithms, such as channel equalization or decoding. The strong link existing between computational speed and power consumption suggests an investigation of signal processing with energy efficiency as a prominent design choice. In this work we revisit the topic of signal processing with analog circuits and its potential to increase the energy efficiency. Channel equalization is chosen as an application of nonlinear signal processing, and a vector equalizer based on a recurrent neural network structure is taken as an example to demonstrate what can be achieved with state of the art in VLSI design. We provide an analysis of the equalizer, including the analog circuit design, system-level simulations, and comparisons with the theoretical algorithm.First measurements of our analog VLSI circuit confirm the possibility to achieve an energy requirement of a few pJ/bit, which is an improvement factor of three to four orders of magnitude compared with today's most energy efficient digital circuits.

Section: Measurement Resultsmentioning

confidence: 99%

Section: R(k)mentioning

confidence: 99%

Section: Real-valued Equalizermentioning

confidence: 99%

See 1 more Smart Citation

Advanced Low Power High Speed Nonlinear Signal Processing: An Analog VLSI Example.

Oliveri

et al. 2016

J Sign Process Syst

“…A fixed point implementation using field programmable gate arrays (FPGA) of the discrete-time RNN as vector equalizer for CDMA has been investigated in [22].…”

Section: B Recurrent Neural Network As Vector Equalizersmentioning

confidence: 99%

Vector equalization based on continuous-time recurrent neural networks

2012 6th International Conference on Signal Processing and Communication Systems

Lindner

2012

The problem of vector equalization based on recurrent neural networks as suboptimum scheme is considered from the analog signal processing point of view. We distinguish between discrete-time recurrent neural networks (DTRNNs) and continuous-time ones (CTRNNs). In contrast to the CTRNNs, the DTRNNs have been extensively investigated and implemented for the vector equalization task with good results for channels with little to moderate interference. However, the growing demand for jointly high date rates and power efficiency (green communications) make analog signal processing an interesting topic in the field of wireless transmission. Analog signal processing possesses the potential to be fast and/or power efficient compared with digital signal processing techniques. In addition, very-largescale integration (VLSI) technology has been shown to fit well as implementation medium for neural networks. All these facts motivate the investigation of CTRNNs as vector equalizer. We show in this paper computer simulations, circuit simulations are in progress.

“…The main drawback for those RNNs is however, they suffer from local minima, whenever they have been applied to optimization problems. These RNNs have been used as DS-CDMA multiuser detector in [11], [12] among the others. One possibility to avoid getting stuck in a local minimum is to increase the steepness parameter of the activation function linearly during the iteration process.…”

Section: Transmission Modelmentioning

confidence: 99%

A modified discrete recurrent neural network as vector detector

2010 IEEE Asia Pacific Conference on Circuits and Systems

Lindner

2010

A vector-valued transmission model is useful in those cases, where multiuser, multisubchannel, or multiantenna systems or combinations thereof are considered. To cope with interblock interference (IBI), interuser (IUI) and/or intersubchannel interference (ISCI), different interference cancellation techniques have been proposed. Recurrent neural networks (RNNs) are known for their capability in minimization of suitable cost functions. However, they are susceptible to get stuck in local minima of the cost function. To avoid this, different methods have been presented in the past. In this paper we investigate the application of a modified RNN to the problem of vector detection and we compare the results with a zero-forcing block linear equalizer ZF-BLE, a minimum mean square error block linear equalizer MMSE-BLE, and with a RNN with linearly increased steepness parameter of the activation function. The advantage of the proposed modified RNN is, that it does not need an adjustable activation function and can be interpreted as a discretised analog RNN. Analog RNNs improve the power/speed ratio and minimize the area consumption in the very large scale integration (VLSI) chip.