Vector equalization based on continuous-time recurrent neural networks

Mohamad, Mostafa; Teich, Werner G.; Lindner, J.

doi:10.1109/icspcs.2012.6508013

Cited by 3 publications

(5 citation statements)

References 19 publications

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“…18 Layout of the vector equalizer and pin configuration. 9,10,11,12,23,24,25,26), six pins for the weights configuration (pads 13,14,18,19,20,21), reset (pad 15), voltage supplies (pads 16,17,22) and grounds (square pads). The active area is approximately 0.09 mm 2 , with a transistor count CNT = 171 for four neurons.…”

Section: Measurement Resultsmentioning

confidence: 99%

“…for l = t equ . The above stated conditions are valid for BPSK, but can be generalized by combining the results of [10,18,19].…”

Section: Equalization Based On Continuous-time Recurrent Neural Networkmentioning

confidence: 99%

“…For the twin subsystem, the total quadrature differential current of the i th neuron (I q,i ) is given in Eq. (18).…”

Section: Circuit Designmentioning

confidence: 99%

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Advanced Low Power High Speed Nonlinear Signal Processing: An Analog VLSI Example.

Oliveri

Mohamad

Teich

et al. 2016

J Sign Process Syst

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Despite the progress made in digital signal processing during the last decades, the constraints imposed by high data rate communications are becoming ever more stringent. Moreover mobile communications raised the importance of power consumption for sophisticated algorithms, such as channel equalization or decoding. The strong link existing between computational speed and power consumption suggests an investigation of signal processing with energy efficiency as a prominent design choice. In this work we revisit the topic of signal processing with analog circuits and its potential to increase the energy efficiency. Channel equalization is chosen as an application of nonlinear signal processing, and a vector equalizer based on a recurrent neural network structure is taken as an example to demonstrate what can be achieved with state of the art in VLSI design. We provide an analysis of the equalizer, including the analog circuit design, system-level simulations, and comparisons with the theoretical algorithm.First measurements of our analog VLSI circuit confirm the possibility to achieve an energy requirement of a few pJ/bit, which is an improvement factor of three to four orders of magnitude compared with today's most energy efficient digital circuits.

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Section: Measurement Resultsmentioning

confidence: 99%

“…for l = t equ . The above stated conditions are valid for BPSK, but can be generalized by combining the results of [10,18,19].…”

Section: Equalization Based On Continuous-time Recurrent Neural Networkmentioning

confidence: 99%

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Advanced Low Power High Speed Nonlinear Signal Processing: An Analog VLSI Example.

Oliveri

Mohamad

Teich

et al. 2016

J Sign Process Syst

Self Cite

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show abstract

“…However, this was limited to the binary phaseshift keying (BPSK) symbol alphabet ψ ={−1, +1}. This has been generalized to complex-valued symbol alphabets in [21] by combining the results of references [20,22,32] 5 . Based thereon, it has been proven that the RNN ends in a local minimum of Eq.…”

Section: A Vector Equalization Based On Rnnmentioning

confidence: 99%

A Continuous-Time Recurrent Neural Network for Joint Equalization and Decoding – Analog Hardware Implementation Aspects

Mohamad¹,

Oliveri²,

Teich³

et al. 2016

Artificial Neural Networks - Models and Applications

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Equalization and channel decoding are "traditionally" two cascade processes at the receiver side of a digital transmission. They aim to achieve a reliable and efficient transmission. For high data rates, the energy consumption of their corresponding algorithms is expected to become a limiting factor. For mobile devices with limited battery's size, the energy consumption, mirrored in the lifetime of the battery, becomes even more crucial. Therefore, an energy-efficient implementation of equalization and decoding algorithms is desirable. The prevailing way is by increasing the energy efficiency of the underlying digital circuits. However, we address here promising alternatives offered by mixed (analog/digital) circuits. We are concerned with modeling joint equalization and decoding as a whole in a continuous-time framework. In doing so, continuous-time recurrent neural networks play an essential role because of their nonlinear characteristic and special suitability for analog very-large-scale integration (VLSI). Based on the proposed model, we show that the superiority of joint equalization and decoding (a wellknown fact from the discrete-time case) preserves in analog. Additionally, analog circuit design related aspects such as adaptivity, connectivity and accuracy are discussed and linked to theoretical aspects of recurrent neural networks such as Lyapunov stability and simulated annealing.

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“…In contrast to the common strategy when dealing with neural networks, RNNs have been shown to be able to perform vector equalization without the need for a training phase, in both the discrete-time case [3]- [5] and the continuous-time case [6], [7]. This is due to their Lyapunov stability under specific conditions [8], [9].…”

Section: Introductionmentioning

confidence: 99%

Approximation of activation functions for vector equalization based on recurrent neural networks

Mohamad

Teich

Lindner

2014

2014 8th International Symposium on Turbo Codes and Iterative Information Processing (ISTC)

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Activation functions represent an essential element in all neural networks structures. They influence the overall behavior of neural networks decisively because of their nonlinear characteristic. Discrete-and continuous-time recurrent neural networks are a special class of neural networks. They have been shown to be able to perform vector equalization without the need for a training phase because they are Lyapunov stable under specific conditions. The activation function in this case depends on the symbol alphabet and is computationally complex to be evaluated. In addition, numerical instability can occur during the evaluation. Thus, there is a need for a computationally less complex and numerically stable evaluation. Especially for the continuous-time recurrent neural network, the evaluation must be suitable for an analog implementation. In this paper, we introduce an approximation of the activation function for vector equalization with recurrent neural networks. The activation function is approximated as a sum of shifted hyperbolic tangent functions, which can easily be realized in analog by a differential amplifier. Based on our ongoing research in this field, the analog implementation of vector equalization with recurrent neural networks is expected to improve the power/speed ratio by several order of magnitude compared with the digital one.

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Vector equalization based on continuous-time recurrent neural networks

Cited by 3 publications

References 19 publications

Advanced Low Power High Speed Nonlinear Signal Processing: An Analog VLSI Example.

Advanced Low Power High Speed Nonlinear Signal Processing: An Analog VLSI Example.

A Continuous-Time Recurrent Neural Network for Joint Equalization and Decoding – Analog Hardware Implementation Aspects

Approximation of activation functions for vector equalization based on recurrent neural networks

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