Toward an Open-Source Digital Flow

Ajayi, Tutu; Chhabria, Vidya A.; Fogaça, Mateus; Hashemi, Soheil; Hosny, Abdelrahman; Kahng, Andrew B.; Kim, Min‐Soo; Lee, Jeongsup; Mallappa, Uday; Neseem, Marina; Pradipta, Geraldo; Reda, Sherief; Saligane, Mehdi; Sapatnekar, Sachin S.; Sechen, Carl; Shalan, Mohamed; Swartz, William J.; Wang, Lutong; Wang, Zhehong; Woo, Mingyu; Xu, Bo

doi:10.1145/3316781.3326334

Cited by 102 publications

(20 citation statements)

References 9 publications

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“…Some approaches to mixed-size placement such as RePlAce [10] (integrated in the open-source OpenROAD initiative [4]) perform global placement using analytic techniques. These techniques tend to first optimize the design and then remove overlaps, which sometimes leads to degrading the previous optimization or not reaching good layouts in terms of legalization.…”

Section: Related Workmentioning

confidence: 99%

Multilevel Dataflow-Driven Macro Placement Guided by RTL Structure and Analytical Methods

Vidal-Obiols

Cortadella

Petit

et al. 2021

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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When RTL designers define the hierarchy of a system, they exploit their knowledge about the conceptual abstractions devised during the design and the functional interactions between the logical components. This valuable information is often lost during physical synthesis. This paper proposes HiDaP, a novel multi-level algorithm that uses RTL information and analytical methods for the macro placement problem of modern designs dominated by multi-cycle connection pipelines. By taking advantage of the hierarchy tree, the netlist is divided into blocks containing macros and standard cells, and their dataflow affinity is inferred considering the register latency and flow width of their interaction. The layout is represented using slicing structures and generated with a top-down algorithm capable of handling blocks with both hard and soft components. An adaptive multi-objective cost function is used to simultaneously minimize wirelength, timing, overlap and distance to preferred locations, which can be user-defined or generated by analytic methods (spectral and force-directed). These techniques have been applied to a set of large industrial circuits and compared against state-of-theart commercial and academic placers, and also to handcrafted floorplans generated by expert back-end engineers. The proposed approach outperforms previous algorithmic methods and can produce solutions with better wirelength and timing than the best handcrafted floorplans. Post-routing layouts are almost brought to timing closure and DRC cleanness with minimal engineer modification, showing that the generated floorplans provide an excellent starting point for the physical design flow and contribute to reduce turnaround time significantly.

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Section: Related Workmentioning

confidence: 99%

Multilevel Dataflow-Driven Macro Placement Guided by RTL Structure and Analytical Methods

Vidal-Obiols

Cortadella

Petit

et al. 2021

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

View full text Add to dashboard Cite

show abstract

“…Yosys provides synthesis from Verilog RTL to netlist, OpenROAD provides PnR from netlist to DEF, and KLayout provides DEF to GDS conversion as well as design rule checking (DRC) and layout-versus-schematic (LVS) checking. Figure 1 shows the evolution of OpenROAD-flow from its initial implementation [7,8] to the current iteration. The largest improvement to OpenROAD-flow was the shift from a file-based interface to a unified database interface.…”

Section: Responsibilitiesmentioning

confidence: 99%

“…With this motivation in mind, The OpenROAD Project aims to create a fully autonomous, open-source tool chain for full "RTL-to-GDS" digital layout generation. With such a tool, numerous issues can be addressed, including engineering resources, licensing, collaboration, and reproducibility [7,8,12].…”

mentioning

confidence: 99%

“…The original intent of the internal design advisor was to use real-world designs for tool testing and feedback, as well as provide human intelligence to guide tool development (similar to application or product engineers). Over the course of the project, however, it became apparent that key responsibilities for realization of Open-ROAD goals [7,8] did not fit cleanly into the project's organization structure. As such, the design advisor role has evolved to encompass several additional tasks which can be categorized under two responsibilities:…”

mentioning

confidence: 99%

“…Even with well-defined OpenROAD tool interfaces, orchestrating a full RTL-to-GDS flow is a non-trivial task. Since creating the previous iterations of OpenROAD-flow [7,8], we have substantially overhauled the flow to transition from a tool chain of stand-alone binaries to an integrated app. In addition, we are responsible for interjecting flow-level solutions which increase autonomy and reduce burden on developers.…”

mentioning

confidence: 99%

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