Total Dose and Bias Temperature Stress Effects for HfSiON on Si MOS Capacitors

Chen, D.K.; Mamouni, F. El; Zhou, X. J.; Schrimpf, R.D.; Fleetwood, D.M.; Galloway, K.F.; Lee, S.; Seo, Hyungtak; Lucovsky, G.; Jun, Bongim; Cressler, John D.

doi:10.1109/tns.2007.910862

Cited by 19 publications

(6 citation statements)

References 31 publications

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“…Note added in proof-The total-dose X-ray response of low-and high-Si 3 N 4 content Hf Si oxynitride alloy test device has been determined, and then compared with SiO 2 and HfO 2 devices. 27) Differences in the radiation response and capacitance-voltage (C-V) traces for low-and high-Si 3 N 4 content Hf Si oxynitride devices are consistent with electron traps originating at extended O-atom vacancies clustered at grain boundaries in HfO 2 nano-grains in the chemically phase separated low-Si 3 N 4 films. 2,3) In contrast, there is no detectable electron trapping in the high-Si 3 N 4 alloy devices that are stable to at least 1000 C, and in which the level of hole trap generation is comparable to what is typically reported for SiO 2 devices.…”

Section: Acknowledgementsmentioning

confidence: 58%

Intrinsic Electronically Active Defects in Transition Metal Elemental Oxides

Lucovsky

Seo

Lee

et al. 2007

jjap

137

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Densities of interfacial and bulk defects in high-dielectrics are typically about two orders of magnitude larger than those in Si-SiO 2 devices. An asymmetry in electron and hole trapping kinetics, first detected in test capacitor devices with nanocrystalline ZrO 2 and HfO 2 dielectrics, is a significant potential limitation for Si device operation and reliability in complementary metal oxide semiconductor applications. There are two crucial issues: i) are the electron and hole traps intrinsic defects, or are they associated with processed-introduced impurities?, and ii) what are the local atomic bonding arrangements and electronic state energies of these traps? In this study, thin film nanocrystalline high-gate dielectrics, TiO 2 , ZrO 2 , and HfO 2 (group IVB TM oxides), are investigated spectroscopically to identify the intrinsic electronic structures of valence and conduction band states, as well as those of intrinsic bonding defects. A quantitative/qualitative distinction is made between crystal field and Jahn-Teller (J-T) d-state energy differences in nanocrystralline TM elemental oxides, and noncrystalline TM silicates and Si oxynitrides. It is experimentally shown and theoretically supported that a length scale for nanocrystallite size < 2-3 nm i) eliminates J-T d-state term splittings in band edge -bonded d-states, and ii) represents a transition from the observation of discrete band edge defects to band-tail defects. Additionally, -state bonding coherence can also be disrupted with similar effects on band edge and defect states in HfO 2 films which have been annealed in NH 3 at 700 C, and display Hf-N bonds in N atom K 1 edge X-ray absorption spectra.

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Section: Acknowledgementsmentioning

confidence: 58%

Intrinsic Electronically Active Defects in Transition Metal Elemental Oxides

Lucovsky

Seo

Lee

et al. 2007

jjap

137

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“…Another important reason affecting the charge-trapping properties is precursor defects in the grain boundaries. Particularly, electron trap sites originate from grain boundary-induced defect states [17], [62].…”

Section: B 60 Co Irradiation Effects On Er 2 O 3 P-mos Capacitormentioning

confidence: 99%

“…The primary problem in a device with SiO 2 is gate leakage current, which occurs in film thicknesses less than 1.2 nm [13]- [16]. However, high-k materials have been shown to be a promising candidate for MOS-based technology in numerous studies because they have larger charge storage properties with respect to SiO 2 , and their physical thickness can be increased without losing the low electrical oxide thickness [17]- [19]. The radiation response and electrical characteristic of the MOSbased sensor are influenced by several parameters, such as oxide/Si interface quality, the film growth technique, the energy band gap and band offsets of the high-k oxide.…”

mentioning

confidence: 99%

Evaluation of Radiation Sensor Aspects of $\text{Er}_2$$\text{O}_3$ MOS Capacitors under Zero Gate Bias

Kahraman

Yılmaz

Aktağ

et al. 2016

IEEE Trans. Nucl. Sci.

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The aim of the present study is to investigate the usage of Erbium Oxide (Er2O3) as a gate dielectric in MOS-based radiation sensors. Er2O3 thin films were deposited on a p-type Si (100) substrate via RF magnetron sputtering and were annealed at 500 • C under N2 ambient. The structural properties of the Er2O3 thin films were determined via XRD, FTIR, and AFM analyses. The Erbium silicate formation was not observed in the XRD and FTIR spectra. The roughness root-mean-square was measured as 16.4 nm by the AFM analysis. Following the description of the film, the Er2O3 MOS capacitors were fabricated and irradiated by a 60 Co radioactive source in different doses varying from 4 Gy to 76 Gy. The capacitance-voltage (C-V) curves shifted to the right side compared to the ideal one in the dose range of 4-16 Gy and to the left side from 16 Gy to 76 Gy. The oxide trapped charge density increased with an increasing irradiation dose. A significant variation in the interface states densities was not observed, the value of which always remained in the order of 10 10 eV cm −2 in the studied dose range. Based on these results, it can be said that gamma radiation does not cause a significant deterioration during irradiation. The calibration curve of the capacitor was obtained from the flat band voltage shifts depending on the gamma dose. Some electrical parameters, such as the barrier height and acceptor concentration, were investigated depending on the gamma dose. The sensitivity of the capacitor was determined to be 107 mV/Gy for the dose range of 4-16 Gy and 61 mV/Gy for the dose range of 16-76. These results showed that the Er2O3 MOS capacitor was more sensitive to the gamma radiation compared to the SiO2 and Sm2O3-based capacitors.

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“…Compared to those without annealing, a much larger memory window for 550 C annealed memory devices can be attributed to the combination of a higher j value of the charge trapping layer and more trapping sites provided by grain boundaries in the t-ZrO 2 . 29,30 For 500 C annealed memory devices, a memory window smaller than that of the 550 C annealed ones may be due to the lower grain boundary trap density. This inference is preliminarily confirmed by examining the full width at half maximum (FWHM) of the XRD peak for 500 and 550 C annealed stacks because an increased FWHM implies a decrease in grain size.…”

Section: Resultsmentioning

confidence: 99%

Ge-Based Nonvolatile Memory Formed on Si Substrate with Ge-Stabilized Tetragonal ZrO2 as Charge Trapping Layer

et al. 2011

J. Electrochem. Soc.

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With Si substrate, Ge-based nonvolatile memory devices with the charge trapping layer and tunnel dielectric respectively formed by a Ge-stabilized tetragonal ZrO 2 film and a thermal GeO 2 film are explored in this work. A 1.8-V memory window is achieved by program/erase (P/E) at 65 V for 1 ms which proves high-speed/low-voltage operation and this desirable characteristic is mainly due to the crystalline ZrO 2 trapping layer which provides a high permittivity of 36.8 with a large amount of trapping sites. A negligible degradation of memory window up to 10 5 P/E cycles can be accomplished by applying gate pulse of 65 V for 1 ms and it demonstrates that the thermal GeO 2 film is robust enough to offer the required reliability. Good retention characteristics with 70% charge after a 10 year operation at 85 C also affirm the eligibility of GeO 2 as the tunnel dielectric. These results suggest that this novel device structure holds great potential for future high-performance memory.High permittivity (high-j) dielectrics have been widely perceived as a technology that can boost the performance of field effect transistors. 1-6 For charge-trapping-type nonvolatile memory (NVM), to achieve a program/erase (P/E) voltage as low as 5-7 V, which is the International Technology Roadmap for Semiconductor (ITRS)'s predicted operation voltage in 2015, adopting high-j dielectric(s) as the charge trapping layer is inevitable. This is because the use of high-j dielectrics improves the charge retention time and lowers the operation voltage as a result of a larger conduction band offset (DE C ) with respect to the tunnel dielectric and a higher electric field over the tunnel dielectric owing to electric flux density continuity, respectively. 7 Although high-j dielectrics have been extensively investigated, 7-12 most of them are amorphous, and crystalline dielectrics have seldom been discussed because the leakage current arising from grain boundaries may degrade the retention performance. However, a crystalline high-j dielectric such as tetragonal phase ZrO 2 (t-ZrO 2 ) has a theoretic j value of 46.6, 13 which is much higher than its amorphous phase, and will thus be beneficial to memory performance. We recently overcame the leakage issue of an atomic layer deposition (ALD)-grown t-ZrO 2 layer by using postdeposition NH 3 annealing to passivate the grain boundaries. We demonstrated the great potential of a crystalline dielectric as an advanced charge trapping layer for NVM. 14 In addition to a high-j charge trapping layer, we also demonstrated that employing Ge to replace conventional Si as a channel material is a promising alternative to boost memory performance 15 because enhanced data access and P/E speed can be expected as a result of a superior carrier mobility compared to Si and a smaller bandgap which renders a higher impact ionization rate and band-to-band tunneling-induced hot electron/hole generation, respectively. To combine the advantages of a high-j charge trapping layer and a Ge channel, in this work, NVM devices integrat...

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Total Dose and Bias Temperature Stress Effects for HfSiON on Si MOS Capacitors

Cited by 19 publications

References 31 publications

Intrinsic Electronically Active Defects in Transition Metal Elemental Oxides

Intrinsic Electronically Active Defects in Transition Metal Elemental Oxides

Evaluation of Radiation Sensor Aspects of $\text{Er}_2$$\text{O}_3$ MOS Capacitors under Zero Gate Bias

Ge-Based Nonvolatile Memory Formed on Si Substrate with Ge-Stabilized Tetragonal ZrO2 as Charge Trapping Layer

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