Top-Gate CVD WSe2 pFETs with Record-High Id~594 μA/μm, Gm~244 μS/μm and WSe2/MoS2 CFET based Half-adder Circuit Using Monolithic 3D Integration

Xiong, Xiong; Liu, Shiyuan; Liu, Honggang; Chen, Yang; Shi, Xinhang; Wang, Xin; Li, Xuefei; Huang, Ru; Wu, Yanqing

doi:10.1109/iedm45625.2022.10019476

Cited by 5 publications

(4 citation statements)

References 12 publications

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“…227 In 2022, TSMC proposed a practical integration flow for stacked 2D nanosheets and demonstrated a nanosheet GAA monolayer-MoS 2 FET with an on-state current of 410 μA μm −1 at V DS = 1 V. 228 Wu's group showed that monolithic 3D stacking comple-mentary FETs (CFETs) based on CVD-grown 2D material channels can be used for 4T SRAM and 16T half-adder. 229 Large-Scale Demonstrations. For large-scale integration circuits, the uniformity of the device performance is a concern for achieving circuit functionality efficiently.…”

Section: Performace Optimization and Integration Of 2d Transistorsmentioning

confidence: 99%

“…In 2022, TSMC proposed a practical integration flow for stacked 2D nanosheets and demonstrated a nanosheet GAA monolayer-MoS 2 FET with an on-state current of 410 μA μm –1 at V DS = 1 V . Wu’s group showed that monolithic 3D stacking complementary FETs (CFETs) based on CVD-grown 2D material channels can be used for 4T SRAM and 16T half-adder …”

Section: Performace Optimization and Integration Of 2d Transistorsmentioning

confidence: 99%

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Two-Dimensional Semiconductors and Transistors for Future Integrated Circuits

Yin,

Cheng,

Ding

et al. 2024

ACS Nano

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Silicon transistors are approaching their physical limit, calling for the emergence of a technological revolution. As the acknowledged ultimate version of transistor channels, 2D semiconductors are of interest for the development of post-Moore electronics due to their useful properties and all-in-one potentials. Here, the promise and current status of 2D semiconductors and transistors are reviewed, from materials and devices to integrated applications. First, we outline the evolution and challenges of silicon-based integrated circuits, followed by a detailed discussion on the properties and preparation strategies of 2D semiconductors and van der Waals heterostructures. Subsequently, the significant progress of 2D transistors, including device optimization, large-scale integration, and unconventional devices, are presented. We also examine 2D semiconductors for advanced heterogeneous and multifunctional integration beyond CMOS. Finally, the key technical challenges and potential strategies for 2D transistors and integrated circuits are also discussed. We envision that the field of 2D semiconductors and transistors could yield substantial progress in the upcoming years and hope this review will trigger the interest of scientists planning their next experiment.

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Section: Performace Optimization and Integration Of 2d Transistorsmentioning

confidence: 99%

Section: Performace Optimization and Integration Of 2d Transistorsmentioning

confidence: 99%

Two-Dimensional Semiconductors and Transistors for Future Integrated Circuits

Yin,

Cheng,

Ding

et al. 2024

ACS Nano

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“…This is the most complex IC so far made from 2D materials. In [660], the top gate p-channel bilayer WSe2 transistor was optimized by low-temperature post-metal annealing, achieving a record-high Ion of −594 µA • µm −1 and gm of −244 µS/µm at V ds = −2 V with L ch = 135 nm (Figure 55(h)). Owing to symmetrical V th for p-type WSe2 and n-type MoS2 transistors, a half-adder CFET circuit was experimentally demonstrated.…”

Section: State-of-the-art Icmentioning

confidence: 99%

Two-dimensional materials for future information technology: status and prospects

Qiu,

Yu,

Zhao

et al. 2024

Sci. China Inf. Sci.

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Over the past 70 years, the semiconductor industry has undergone transformative changes, largely driven by the miniaturization of devices and the integration of innovative structures and materials. Two-dimensional (2D) materials like transition metal dichalcogenides (TMDs) and graphene are pivotal in overcoming the limitations of silicon-based technologies, offering innovative approaches in transistor design and functionality, enabling atomic-thin channel transistors and monolithic 3D integration. We review the important progress in the application of 2D materials in future information technology, focusing in particular on microelectronics and optoelectronics. We comprehensively summarize the key advancements across material production, characterization metrology, electronic devices, optoelectronic devices, and heterogeneous integration on silicon. A strategic roadmap and key challenges for the transition of 2D materials from basic research to industrial development are outlined. To facilitate such a transition, key technologies and tools dedicated to 2D materials must be developed to meet industrial standards, and the employment of AI in material growth, characterizations, and circuit design will be essential. It is time for academia to actively engage with industry to drive the next 10 years of 2D material research.

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“…[19][20][21][22][23] In the TMDC family, MoS 2 and WSe 2 have been considered as n-channel FET and p-channel FET, respectively, which attracted much attention from academia and industry. [24][25][26][27] However, MoTe 2 is also a potential 2D channel material because the polarity can be tunable due to the smaller band gap of 0.9 eV in multilayer and 1.1 eV in monolayer compared with other TMDC materials. 28) Furthermore, MoTe 2 readily undergoes n-or p-type doping through a range of physical and chemical approaches, including annealing, O 2 plasma treatment, and immersion in benzyl viologen solution.…”

Section: Introductionmentioning

confidence: 99%

Realization of MoTe₂ CMOS inverter by contact doping and channel encapsulation

Xie,

Ke,

Ueno

et al. 2024

Jpn. J. Appl. Phys.

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The Fermi level pinning (FLP) effect significantly limits the application of electrical devices based on two-dimensional (2D) materials like transition metal dichalcogenide (TMDC). Here, a complementary metal–oxide–semiconductor (CMOS) inverter, which is comprised of an n- and a p-MoTe2 FET with optimized properties, has been successfully fabricated by using contact doping and channel encapsulation methods. Contact doping is to control the polarity of MoTe2-FET and improve contact properties, which is achieved by laser irradiation in different environmental conditions. The channel of two MoTe2-FETs was encapsulated by hexagonal boron nitride (h-BN) to enhance carrier mobility and device stability. The fabricated CMOS inverter showed a very high gain value of 31 at V dd = 4 V at room temperature.

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Top-Gate CVD WSe₂ pFETs with Record-High I_d~594 μA/μm, G_m~244 μS/μm and WSe₂/MoS₂ CFET based Half-adder Circuit Using Monolithic 3D Integration

Cited by 5 publications

References 12 publications

Two-Dimensional Semiconductors and Transistors for Future Integrated Circuits

Two-Dimensional Semiconductors and Transistors for Future Integrated Circuits

Two-dimensional materials for future information technology: status and prospects

Realization of MoTe₂ CMOS inverter by contact doping and channel encapsulation

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Top-Gate CVD WSe2 pFETs with Record-High Id~594 μA/μm, Gm~244 μS/μm and WSe2/MoS2 CFET based Half-adder Circuit Using Monolithic 3D Integration

Cited by 5 publications

References 12 publications

Two-Dimensional Semiconductors and Transistors for Future Integrated Circuits

Two-Dimensional Semiconductors and Transistors for Future Integrated Circuits

Two-dimensional materials for future information technology: status and prospects

Realization of MoTe2 CMOS inverter by contact doping and channel encapsulation

Contact Info

Product

Resources

About

Top-Gate CVD WSe₂ pFETs with Record-High I_d~594 μA/μm, G_m~244 μS/μm and WSe₂/MoS₂ CFET based Half-adder Circuit Using Monolithic 3D Integration

Realization of MoTe₂ CMOS inverter by contact doping and channel encapsulation