Tolerance analysis of a GFET transistor for aerospace and aeronautical application

Abstract

Due to the high carrier mobility, graphene is considered a promising material for use in high-speed electronic devices in the post-silicon electronic era. Graphene high resistance to radiation and extreme temperatures makes the development of graphene-based electronics a key-enabling technology for aerospace, defence, and aeronautical applications. Nevertheless, achieving uniform device-to-device performance is still a challenge, and these fields require high reliability components. In particular, many critical issues remain to be solved, such as their reproducibility and guaranty of identical performances against possible variations of different manufacturing and environmental factors. In the present work, a model capable to take into account the physical characteristics linked to the production process of a Graphene Field-Effect Transistor (GFET) is exploited to carry out a tolerance analysis of process-related geometrical parameters on the device performance. The most influential parameters that affect the device behaviour are studied in order to enhance the fabrication yield.

Numerical Evaluation of the Effect of Geometric Tolerances on the High-Frequency Performance of Graphene Field-Effect Transistors

“…In this work, the factors chosen for the tolerance analysis are W, L, and t OX , and in the absence of an initial estimate of the process tolerances, a variation ±∆ within the 10% of the nominal value is considered for each factor, in analogy with the approach proposed in [62,63,[67][68][69].…”

“…Table 1 reports the minimum, nominal, and maximum values of the simulation input parameters. The centre values for the three factors W, L, t OX refer to the nominal design of the device described in [45] and investigated in [62,70].…”

“…This model preserves charge conservation and considers non-reciprocal self-capacitances and transcapacitances, contrarily to the Meyer's and Meyer-like models commonly used [61]. The simulated device is the GFET common-source amplifier, made of high-quality singlelayer CVD-grown graphene transferred onto a silicon oxide substrate, with an ultrathin high-k dielectric gate oxide [79] and a 6-finger embedded gate, presented in [45] as the first high-frequency voltage amplifier obtained by using large-area graphene and already simulated in [62,70]. The compact model used for the circuit simulations requires setting the input parameters related to the geometry, to the oxide material properties, and to the graphene characteristics.…”

“…the first high-frequency voltage amplifier obtained by using large-area graphene and al-ready simulated in [62,70]. The compact model used for the circuit simulations requires setting the input parameters related to the geometry, to the oxide material properties, and to the graphene characteristics.…”

“…The Advanced Design System ® (Keysight Technologies, Inc., Santa Rosa, CA, USA) simulation environment is used by varying channel width, W, the channel length, L, and the top oxide thickness, t OX , in order to investigate the impact of geometry variations caused by the fabrication of process-related tolerances. Following the study presented in [62], where we discussed the impact of tolerances on the amplifier's transconductance, g m , and output conductance, g ds , the influence of the same variations is reported here on the high-frequency performance described in terms of f T and f MAX .…”