Time-Domain Analysis of Chalcogenide Threshold Switching: From ns to ps Scale

Abstract

A space- and time-dependent theoretical model based on a trap-assisted, charge-transport framework for the amorphous phase of a chalcogenide material is used here to interpret available experimental results for the electric current of nanoscale devices in the ns–ps time domain. A numerical solution of the constitutive equations of the model for a time-dependent bias has been carried out for GST-225 devices. The “intrinsic” rise time of the device current after the application of a suitable external bias is controlled by the microscopic relaxation of the mobile-carrier population to the steady-state value. Furthermore, the analysis is extended to include the effect of the external circuit on the electrical switching. A quantitative estimate of the current delay time due to unavoidable parasitic effects is made for the optimised electrical set up configurations recently used by experimental groups.