Tiling Optimizations for 3D Scientific Computations

Rivera, Gabriel; Tseng, Chau‐Wen

doi:10.1109/sc.2000.10015

Cited by 141 publications

(140 citation statements)

References 41 publications

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“…The data provided in the table are normalized with respect to the timing and energy usage of the original program (compiled with the -O3) when run at the highest available frequency. Empirical tuning via automatic generation of code alternatives and/or careful selection of parameters that govern the application of different optimization strategies has proven its merit in last few decades [24,27,28]. Needless to say, the technique delivers its promise in our experiments as well.…”

Section: Results For Poisson's Equation Solver (Pes)mentioning

confidence: 99%

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Auto-tuning for Energy Usage in Scientific Applications

Tiwari

Laurenzano

Carrington

et al. 2012

Euro-Par 2011: Parallel Processing Workshops

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Abstract. The power wall has become a dominant impeding factor in the realm of exascale system design. It is therefore important to understand how to most effectively create application software in order to minimize its power usage while maintaining satisfactory levels of performance. In this work, we use existing software and hardware facilities in order to tune applications to minimize for several combinations of power and performance. The tuning is done with respect to software level performance-related tunables (cache tiling factors and loop unrolling factors) as well as for processor clock frequency. These tunable parameters are explored via an offline search in order to find the parameter combinations that are optimal with respect to performance (or delay, D), energy (E), energy×delay (E × D) and energy×delay×delay (E × D 2 ). These searches are employed on a parallel application that solves Poisson's equation using stencil computations. Stencil (nearestneighbor) computations are very common operations in today's scientific applications. We show that the parameter configuration that minimizes energy consumption can save, on average, 5.4% energy with a performance loss of 4% when compared to the configuration that minimizes runtime. Furthermore, with the work presented in this paper, we provide evidence for the existence of opportunities to auto-tune for energy in parallel applications.

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Section: Results For Poisson's Equation Solver (Pes)mentioning

confidence: 99%

“…al. 's tiling scheme [24]. Better cache utilization can reduce overall power usage because it reduces data movement costs.…”

Section: Motivationmentioning

confidence: 99%

Auto-tuning for Energy Usage in Scientific Applications

Tiwari

Laurenzano

Carrington

et al. 2012

Euro-Par 2011: Parallel Processing Workshops

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“…Space blocking algorithms promote data reuse by traversing data in a specific order. Space blocking is especially useful when the dataset structure does not fit into the memory hierarchy [12,5]. Time blocking algorithms [8] perform loop unrolling over time-step sweeps to exploit the grid points as much as possible, and thus increase data reuse.…”

Section: Boosting Numerical Codesmentioning

confidence: 99%

Unveiling WARIS Code, a Parallel and Multi-purpose FDM Framework

Cruz

Hanzich

Folch

et al. 2014

Lecture Notes in Computational Science and Engineering

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Abstract. WARIS is an in-house multi-purpose framework focused on solving scientific problems using Finite Difference Methods as numerical scheme. Its framework was designed from scratch to solve in a parallel and efficient way Earth Science and Computational Fluid Dynamic problems on a wide variety of architectures. WARIS uses structured meshes to discretize the problem domains, as these are better suited for optimization in accelerator-based architectures. To succeed in such challenge, WARIS framework was initially designed to be modular in order to ease development cycles, portability, reusability and future extensions of the framework. In order to assess its performance, a code that solves the vectorial AdvectionDiffusion-Sedimentation equation has been ported to the WARIS framework. This problem appears in many geophysical applications, including atmospheric transport of passive substances. As an application example, we focus on atmospheric dispersion of volcanic ash, a case in which operational code performance is critical given the threat posed by this substance on aircraft engines. Preliminary results are very promising, performance has been improved by 8.2× with respect to the baseline code using a realistic case. This opens new perspectives for operational setups, including efficient ensemble forecast.

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“…Tiling is a well-known technique to optimize ISL applications [19][21] [28][29] [33]. In some circumstances, compilers are able to tile stencil iterations to localize computation or/and exploit parallelism [3][13] [35].…”

Section: Related Workmentioning

confidence: 99%

A Performance Study for Iterative Stencil Loops on GPUs with Ghost Zone Optimizations

Meng

Skadron

2010

Int J Parallel Prog

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Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture, there are usually halo regions that need to be updated and exchanged among different processing elements (PEs). In addition, synchronization is often used to signal the completion of halo exchanges. Both communication and synchronization may incur significant overhead on parallel architectures with shared memory. This is especially true in the case of graphics processors (GPUs), which do not preserve the state of the per-core L1 storage across global synchronizations. To reduce these overheads, ghost zones can be created to replicate stencil operations, reducing communication and synchronization costs at the expense of redundantly computing some values on multiple PEs. However, the selection of the optimal ghost zone size depends on the characteristics of both the architecture and the application, and it has only been studied for message-passing systems in distributed environments. To automate this process on shared memory systems, we establish a performance model using NVIDIA's Tesla architecture as a case study and propose a framework that uses the performance model to automatically select the ghost zone size that performs best and generate appropriate code. The modeling is validated by four diverse ISL applications, for which the predicted ghost zone configurations are able to achieve a speedup no less than 95% of the optimal speedup.

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Tiling Optimizations for 3D Scientific Computations

Cited by 141 publications

References 41 publications

Auto-tuning for Energy Usage in Scientific Applications

Auto-tuning for Energy Usage in Scientific Applications

Unveiling WARIS Code, a Parallel and Multi-purpose FDM Framework

A Performance Study for Iterative Stencil Loops on GPUs with Ghost Zone Optimizations

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