Through the Looking Glass?The 2015 Edition: Trends in Solid-State Circuits from ISSCC

Narendra, S.; Fujino, Laura Chizuko; Smith, K.C.

doi:10.1109/mssc.2014.2375071

Cited by 27 publications

(2 citation statements)

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“…Note that the system analysis presented in this paper considers relatively power-hungry 2.4GHz RF transmission module. The recent advancements in radios for IoT sensor nodes have focused on enhancing transmission power efficiency [23], creating a stronger need to reduce computation energy in such sensor nodes. Therefore, the proposed approach is suitable solution for emerging IoT sensor platforms with low-power radio.…”

Section: Comparison Of the Rate Controller Schemesmentioning

confidence: 99%

An energy-efficient wireless video sensor node with a region-of-interest based multi-parameter rate controller for moving object surveillance

Mukhopadhyay

2016

2016 13th IEEE International Conference on Advanced Video and Signal Based Surveillance (AVSS)

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This paper presents a lightweight video sensor node for moving object surveillance using region-of-interest (ROI) based coding and an on-line multi-parameter rate controller. The proposed ROI-based coding scheme determines ROI blocks, pre-processes non-ROI blocks using bit-truncation, and encodes all blocks using Motion JPEG. The on-line rate controller modulates the parameters of the ROI-based coding scheme to match the encoded data rate and transmission data rate under the variations in channel bandwidth and input video content. The low-complexity hardware of the ROI-based coding scheme reduces computation energy, and the on-line rate controller minimizes buffer requirement. The sensor node is designed in 130nm CMOS and prototyped in a Virtex-V FPGA. Simulations show that, under the same ROI quality, the proposed approach reduces system energy by 61% compared to H.264/AVC. Figure 1: ROI-based rate controller design (a) tied to H.264/AVC and (b) based on a simple encoder (MJPEG).

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Section: Comparison Of the Rate Controller Schemesmentioning

confidence: 99%

An energy-efficient wireless video sensor node with a region-of-interest based multi-parameter rate controller for moving object surveillance

Mukhopadhyay

2016

2016 13th IEEE International Conference on Advanced Video and Signal Based Surveillance (AVSS)

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“…而随着手机等个人无线终端的兴起, 单个终端设备往往需要集成多种无线通信模式. 因此, 如何在系统芯片中集成多种射频收发器以及相关数字基带并保证各通信模块正常工作就成为下一代通信系统芯片的技术难点, 而多模可重构射频收发机与数据转换技术是解决这一难题的有效途径[59] .通过硬件可重构技术实现前端多模射频收发机, 如可重构的频率综合器、射频功率放大器、低噪声放大器、滤波器、混频器等. 可重构技术可以使得单个射频模块同时应用于多个模式或频段, 极大提高模块利用率, 减少芯片面积.…”

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Micro/Nano-scale integrated circuits and new emerging hybrid integration techniques

Zeng¹,

Li²,

Chen³

et al. 2016

Sci. Sin.-Inf.

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曾晓洋等: 微纳集成电路和新型混合集成技术能力 [3]. 即使采取了诸多改进手段 UTBSOI 器件在推进到 10 nm 及以下节点时, 硅膜的厚度仍要求小于 5 nm, 这对于大规模制造而言存在极高的挑战. 不同于 UTBSOI 技术, FinFET 技术通过光刻和刻蚀工艺形成竖直的鱼鳍状超薄体沟道区 (fin), 栅电极跨越在沟道区上, 形成 "几" 字形的结构同时从顶端和侧面对沟道电荷进行控制 [2]. 这种结构使得 FinFET 器件的等比例缩小能力更强, 能够大幅放宽对沟道厚度 (fin 的宽度) 的要求, 而且版图面积效率高, 在相同集成密度下获得的驱动电流更大. FinFET 器件也存在与 UTBSOI 类似的共性问题, 比如寄生电阻、硅膜厚度涨落、迁移率退化、多阈值控制等. 不过, 近年来的大规模生产实践表明这些问题基本能够得到缓解. 相比较 UTBSOI, 体硅 FinFET 面临的一个较为特殊的问题是体区穿通的问题, 需要采用防穿通掺杂或者体区隔离等措施, 例如 BOI FinFET (body-on-insulator FinFET) 结构 [4]. 当 FinFET 器件进一步缩小时, 将会进化成围栅纳米线这一极限结构. 围栅纳米线器件具有最强的短沟道效应抑制能力. 围栅纳米线器件除了面临超薄体引起的共性问题之外, 还面临着更为严峻的制造工艺挑战, 即形成可控的纳米线结构. 为此, 三星电子提出利用 SiGe 外延和选择性腐蚀的方法制造悬空纳米线 [5] , IBM 提出在 SOI 衬底上对埋氧层进行选择性腐蚀和氢气退火形成边缘光滑的纳米线 [6] , 而北京大学提出了对硅 Fin 进行自限制氧化结合底部腐蚀形成悬空纳米线的方法 [7]. 从目前技术发展的趋势来看, FinFET 在 14 nm 以下节点是主流的器件结构, 并可能在 5 nm 及以下节点进化成为围栅纳米线器件形态, 而 UTBSOI 作为一种补充, 在一些特殊领域存在一定的应用.

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Design of Robust Ratioed CMOS SR Latch

Dodla

Mohapatra

Vijayvargiya

et al. 2020

Lecture Notes in Electrical Engineering

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Through the Looking Glass?The 2015 Edition: Trends in Solid-State Circuits from ISSCC

Cited by 27 publications

References 0 publications

An energy-efficient wireless video sensor node with a region-of-interest based multi-parameter rate controller for moving object surveillance

An energy-efficient wireless video sensor node with a region-of-interest based multi-parameter rate controller for moving object surveillance

Micro/Nano-scale integrated circuits and new emerging hybrid integration techniques

Design of Robust Ratioed CMOS SR Latch

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