2005
DOI: 10.1109/ted.2005.857190
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Three-Dimensional Substrate Impedance Engineering Based on<tex>$hbox p ^-$</tex>/<tex>$hbox p ^+$</tex>Si Substrate for Mixed-Signal System-on-Chip (SoC)

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Cited by 8 publications
(8 citation statements)
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“…It also finds use in fabrication of highly sensitive surface-enhanced Raman scattering substrates [13,14]. Recently, this technique was explored as a means to create a substrate impedance architecture for microwave isolation in mixed-signal integrated circuits [18]. Such architecture can be fabricated by etching a porous region of pore size 1-2 m and depth ∼200 m on a Si substrate, followed by depositing metal into the pores.…”
Section: Introductionmentioning
confidence: 99%
“…It also finds use in fabrication of highly sensitive surface-enhanced Raman scattering substrates [13,14]. Recently, this technique was explored as a means to create a substrate impedance architecture for microwave isolation in mixed-signal integrated circuits [18]. Such architecture can be fabricated by etching a porous region of pore size 1-2 m and depth ∼200 m on a Si substrate, followed by depositing metal into the pores.…”
Section: Introductionmentioning
confidence: 99%
“…Such configuration has shown promising results. Cross-talk test structure based on a p − /p + Si substrate and detailed study was described much more thoroughly in another of our earlier publications [5] and only a brief discussion is presented here. The metalized macroporous moat through p − layer has a width of 50 µm and was connected to the upper ground planes via oxide windows and the p + layer beneath.…”
Section: Resultsmentioning
confidence: 99%
“…Its true effectiveness is however underestimated as an isolation structure. Our simulation result shows that the predicted RF cross-talk reduction using a typical metal trench can be as effective as −100 dB at 40 GHz (Metal moat (S)) [5]. …”
Section: Resultsmentioning
confidence: 99%
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