Three-dimensional integration of nanotechnologies for computing and data storage on a single chip

Abstract

The computing demands of future data-intensive applications will greatly exceed the capabilities of current electronics, and are unlikely to be met by isolated improvements in transistors, data storage technologies or integrated circuit architectures alone. Instead, transformative nanosystems, which use new nanotechnologies to simultaneously realize improved devices and new integrated circuit architectures, are required. Here we present a prototype of such a transformative nanosystem. It consists of more than one million resistive random-access memory cells and more than two million carbon-nanotube field-effect transistors-promising new nanotechnologies for use in energy-efficient digital logic circuits and for dense data storage-fabricated on vertically stacked layers in a single chip. Unlike conventional integrated circuit architectures, the layered fabrication realizes a three-dimensional integrated circuit architecture with fine-grained and dense vertical connectivity between layers of computing, data storage, and input and output (in this instance, sensing). As a result, our nanosystem can capture massive amounts of data every second, store it directly on-chip, perform in situ processing of the captured data, and produce 'highly processed' information. As a working prototype, our nanosystem senses and classifies ambient gases. Furthermore, because the layers are fabricated on top of silicon logic circuitry, our nanosystem is compatible with existing infrastructure for silicon-based technologies. Such complex nano-electronic systems will be essential for future high-performance and highly energy-efficient electronic systems.

The future of electronics based on memristive systems

“…Efficient memristor-CMOS integration is thus key to achieving any system gains. Typical approaches based on chip-level integration or through-silicon vias will not be able to provide the required bandwidth between the memristor layer and the CMOS circuitry, and monolithic integration of memristor arrays directly on top of CMOS circuitry with very-high-density local interconnects is necessary and has indeed been shown experimentally to be feasible 52,53 . Specifically, memristor device fabrication typically requires a low thermal budget that makes the integration compatible with the existing CMOS substrate.…”

Phototunable Biomemory Based on Light‐Mediated Charge Trap

“…Prominent improvements in communication and information technologies generate the exponential growth of data‐storage device requirement due to the fundamental and critical functions of memory‐storage units for contemporary computing system 1, 2, 3, 4, 5, 6, 7, 8, 9, 10. Analysts predict that total memory demand (i.e., 3 × 10 24 bits) will exceed commercial semiconductors supply in 2040 11, 12.…”

Gigahertz integrated circuits based on carbon nanotube films

“…Using randomly oriented or aligned CNT array films, various types of CNT thin-film FETs have been fabricated [9][10][11][12][13] . However, hindered by the limited performance of nanotube FETs, the operation speed of CNT integrated circuits (ICs) [20][21][22][23][24][25][26][27][28][29][30][31] typically falls short of their expected terahertz potential, and that achieved by Si CMOS circuits (gigahertz), by several orders of magnitude. Notably, CNT-based ring oscillators (ROs) with an oscillation frequency (f o ) of 282 MHz have recently been reported 32 .…”