2007
DOI: 10.1080/1206212x.2007.11441866
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Thread-Parallel MPEG-2 and MPEG-4 Encoders for Shared-Memory System-On-Chip Multiprocessors

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(2 citation statements)
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“…Similar to motion estimation, various low power and high throughput VLSI architectures of two dimensional DCT (2D DCT) algorithms have been proposed [10][11][12][13][14][15][16].Other techniques for achieving the high throughput for M.E. and DCT involve Multiprocessing [2][3][4][5][18][19]. and Factorization/SIMD (Single Instruction Multiple Data or Data Level Parallelism) [2][3][4][5][18][19].…”
Section: Introductionmentioning
confidence: 99%
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“…Similar to motion estimation, various low power and high throughput VLSI architectures of two dimensional DCT (2D DCT) algorithms have been proposed [10][11][12][13][14][15][16].Other techniques for achieving the high throughput for M.E. and DCT involve Multiprocessing [2][3][4][5][18][19]. and Factorization/SIMD (Single Instruction Multiple Data or Data Level Parallelism) [2][3][4][5][18][19].…”
Section: Introductionmentioning
confidence: 99%
“…and DCT involve Multiprocessing [2][3][4][5][18][19]. and Factorization/SIMD (Single Instruction Multiple Data or Data Level Parallelism) [2][3][4][5][18][19]. The benefit of multiprocessing as compared to dedicated VLSI architectures comes in terms of flexibility for different applications possibly at a cost of more area, time and power consumption [1].…”
Section: Introductionmentioning
confidence: 99%