Thin Filmencapsulation of microstructures using Sacrificial CF-Polymer

Reuter, Danny; Bertz, A.; Werner, T.; Nowack, M.; Geßner, Thomas

doi:10.1109/sensor.2007.4300138

Cited by 7 publications

(3 citation statements)

References 6 publications

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“…Several solutions to thin-film packaging have been presented in the literature [3][4][5][6][7][8][9][10][11][12][13][14]. High-temperature processes provide better vacuum but require a high thermal budget.…”

Section: Introductionmentioning

confidence: 99%

“…Several high-temperature packages based on low-pressure chemical vapor deposition (LPCVD) have been demonstrated [4,5,9]. Low-temperature thin-film packaging processes have also been presented in the literature [6][7][8]11]. In [6], the electroplated nickel film was used as a capping layer.…”

Section: Introductionmentioning

confidence: 99%

“…In [6], the electroplated nickel film was used as a capping layer. In [7,8], a plasma-enhanced chemical vapor deposition (PECVD) of SiN/SiO was used for the capping layer. Aluminum evaporation and anodization has been used in [11] for defining a porous alumina capping layer.…”

Section: Introductionmentioning

confidence: 99%

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Tube-shaped Pirani gauge forin situhermeticity monitoring of SiN thin-film encapsulation

Santagata¹,

Creemer²,

Iervolino³

et al. 2012

J. Micromech. Microeng.

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Here the integration of a tube-shaped Pirani gauge with a SiN thin-film encapsulation process is presented. The tube geometry gives the sensor a very low detection limit with a small footprint, since the tube is buried under the silicon surface. The Pirani tube is very suitable for in situ evaluation of MEMS vacuum packaging. Moreover, since the Pirani gap is all around the tube and deep below the silicon surface, the deflection of the encapsulation shell is not a concern and wafer-level measurement of the device is possible. Pirani tubes with different lengths are encapsulated inside SiN micropackages in order to measure the resulting vacuum level achieved after the encapsulation step. The longest tube shows a detection limit of 0.1 Pa for a noise level of 50 μV and it has a footprint of only 0.006 mm 2 . The pressure inside the sealed micropackage was extracted to be 0.7 kPa. Furthermore, the pressure is monitored over time to evaluate the hermeticity of the packages. A leak rate of 8×10 −18 Pa m 3 s −1 was measured over four months time.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Tube-shaped Pirani gauge forin situhermeticity monitoring of SiN thin-film encapsulation

Santagata¹,

Creemer²,

Iervolino³

et al. 2012

J. Micromech. Microeng.

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Packaging

2010

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Robust hermetic wafer level thin-film encapsulation technology for stacked MEMS / IC package

Shimooka¹,

Inoue

Endo

et al. 2008

2008 58th Electronic Components and Technology Conference

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This paper reports a thin-film encapsulation technology for wafer level micro-electro-mechanical systems (MEMS) package, using poly-benzo-oxazole (PBO) sacrificial material and plasma enhanced chemical vapor deposited silicon oxide (PECVD SiO) cap layer. This technique, which is applicable for MEMS technologies, saves die size and enables conventional package processes such as dicing, picking, mounting and bonding. Besides the fabrication processes of the thin-film encapsulation, this paper also presents the results of finite element models (FEMs) for the deflection and the mechanical stress of the thin-film caps.Moreover, in order to mount a MEMS chip with the thinfilm capsulations and another integrated circuit (IC) chip that controls a MEMS chip in the same package, we have also developed an epoxy reinforcement technique for protecting the thin-film encapsulations and a topography wafer thinning technique for the MEMS chip. And then the system in package (SiP) for the MEMS and IC chips is fabricated successfully based on the mechanical analysis of the SiP process. IntroductionSince MEMS, such as various sensors and radio frequency (RF) actuators [1], [2], consist of movable parts and need to be operated in vacuum or controlled atmosphere, the conventional package techniques for large-scale integrated circuits (LSIs) cannot be applied [3]. In many cases, as a MEMS chip, which needs to be controlled by another IC chip, is packaged using silicon or glass cap [4]-[6], it has been difficult to reduce the footprint on the printed circuit board (PCB) and assembly cost. To address these issues, we have developed the hermetic thin-film encapsulation structure fabricated by conventional back end of the line (BEOL) technologies of LSIs as a wafer-level packaging (WLP). In this work, the fabrication processes and mechanical modeling results for thin-film encapsulations and the SiP [7] for MEMS and IC chips are shown for the fabrication of the multi-chip package (MCP).

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Thin Filmencapsulation of microstructures using Sacrificial CF-Polymer

Cited by 7 publications

References 6 publications

Tube-shaped Pirani gauge forin situhermeticity monitoring of SiN thin-film encapsulation

Tube-shaped Pirani gauge forin situhermeticity monitoring of SiN thin-film encapsulation

Packaging

Robust hermetic wafer level thin-film encapsulation technology for stacked MEMS / IC package

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