Thermomechanical Interaction Between Thin Bare-Die Package and Thermal Solution in Next-Generation Mobile Computing Platforms

Uppal, Aastha; Peterson, Jerrod; Chang, Je-Young; Guo, Xinyun; Liang, Frank Z.; Tang, Weihua

doi:10.1115/1.4042801

Cited by 2 publications

(1 citation statement)

References 19 publications

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“…While thermal behavior of TIM is of primary concern in package design, the prevalence of various mechanically induced fail modes (highlighted in the earlier paragraph) emphasizes the need for mechanical characterization of TIM as well. Thermal characterization of TIM in packages like its thermal conductivity, thermal resistance, etc., is detailed in this issue [5]. A survey of existing literature also shows the lack of a comprehensive understanding of mechanical behavior of TIMs.…”

Section: Introductionmentioning

confidence: 99%

Mechanical Characterization of Thermal Interface Materials and Its Challenges

Subramanian

Sánchez

Bautista

et al. 2019

Journal of Electronic Packaging

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Thermal interface materials (TIMs) play a vital role in the performance of electronic packages by enabling improved heat dissipation. These materials typically have high thermal conductivity and are designed to offer a lower thermal resistance path for efficient heat transfer. For some semiconductor components, thermal solutions are attached directly to the bare silicon die using TIM materials, while other components use an integrated heat spreader (IHS) attached on top of the die(s) and the thermal solution attached on top of the IHS. For cases with an IHS, two TIM materials are used—TIM1 is applied between the silicon die and IHS and TIM2 is used between IHS and thermal solution. TIM materials are usually comprised of a polymer matrix with thermally conductive fillers such as silica, aluminum, alumina, boron nitride, zinc oxide, etc. The polymer matrix wets the contact surface to lower the contact resistance, while the fillers help reduce the bulk resistance by increasing the bulk thermal conductivity. TIM thickness varies by application but is typically between 25 μm and around 250 μm. Selection of appropriate TIM1 and TIM2 materials is necessary for the reliable thermal performance of a product over its life and end-use conditions. It has been observed that during reliability testing, TIM materials are prone to degradation which in turn leads to a reduction in the thermal performance of the product. Typical material degradation is in the form of hardening, compression set, interfacial delamination, voiding, or excessive bleed-out. Therefore, in order to identify viable TIM materials, characterization of the thermomechanical behavior of these materials becomes important. However, developing effective metrologies for TIM characterization is difficult for two reasons: TIM materials are very soft, and the sample thickness is very small. Therefore, a well-designed test setup and a repeatable sample preparation and test procedure are needed to overcome these challenges and to obtain reliable data. In this paper, we will share some of the TIM characterization techniques developed for TIM material down-selection. The focus will be on mechanical characterization of TIM materials—including modulus, compression set, coefficient of thermal expansion (CTE), adhesion strength, and pump-out/bleed-out measurement techniques. Also, results from several TIM formulations, such as polymer TIMs and thermal gap pads, will be shared.

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Section: Introductionmentioning

confidence: 99%

Mechanical Characterization of Thermal Interface Materials and Its Challenges

Subramanian

Sánchez

Bautista

et al. 2019

Journal of Electronic Packaging

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Fabrication Steps and Thermal Modeling of Three-Dimensional Asynchronous Field Programmable Gate Array (3D-AFPGA) With Through Silicon Via and Copper Pillar Bonding Approach

Choobineh

Carrol

Gutierrez

et al. 2020

Journal of Electronic Packaging

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This work will specifically detail the development of a processing and fabrication route for a three-dimensional asynchronous field-programmable gate array (3D-AFPGA) design based on an extension of pre-existing two-dimensional-field-programmable gate array (2D-FPGA) tile designs. The periodic nature of FPGAs permits the use of an alternative approach, whereby the design entails splitting the FPGA design along tile borders and inserting through silicon vias (TSVs) at regular spatial intervals. This serves to enable true 3D performance (i.e., full 3D signal routing) while leaving most of the 2D circuit layouts intact. 3D signal buffers are inserted to handle communication between vertical and adjacent neighbors. For this approach, the density of vertical interconnections was shown to be determined by the size of the bond pads used for tier–tier communications and bonding. As a consequence, reducing bond pad dimensions from 25 μm to 15 μm, or 10 μm, bond pads are preferred to increase the connectivity between layers. A 3D-AFPGA mockup test structure was then proposed for completing development and exercising the 3D integration process flows. This mockup test structure consists of a three-tier demonstration vehicle consisting of a chip-to-wafer and a subsequent chip-to-chip bond. Besides, an alternate copper bonding approach using pillars was explored. Although the intended application is for the 3D integration process compatible with the 3D AFPGA design, the test structure was also designed to be generally applicable to various applications for 3D integration. Because of the importance of thermal management of 3D-AFPGA, it is important to predict the temperature distribution and avoid the maximum junction temperature. The numerical thermal modeling for predicting the equivalent thermal conductivity in every layer and the 3D temperature distribution in the 3D-AFPGA are developed and discussed as well.

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Thermomechanical Interaction Between Thin Bare-Die Package and Thermal Solution in Next-Generation Mobile Computing Platforms

Cited by 2 publications

References 19 publications

Mechanical Characterization of Thermal Interface Materials and Its Challenges

Mechanical Characterization of Thermal Interface Materials and Its Challenges

Fabrication Steps and Thermal Modeling of Three-Dimensional Asynchronous Field Programmable Gate Array (3D-AFPGA) With Through Silicon Via and Copper Pillar Bonding Approach

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