Fabrication Steps and Thermal Modeling of Three-Dimensional Asynchronous Field Programmable Gate Array (3D-AFPGA) With Through Silicon Via and Copper Pillar Bonding Approach
Abstract:This work will specifically detail the development of a processing and fabrication route for a three-dimensional asynchronous field-programmable gate array (3D-AFPGA) design based on an extension of pre-existing two-dimensional-field-programmable gate array (2D-FPGA) tile designs. The periodic nature of FPGAs permits the use of an alternative approach, whereby the design entails splitting the FPGA design along tile borders and inserting through silicon vias (TSVs) at regular spatial intervals. This serves to e… Show more
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