2012
DOI: 10.1063/1.3683472
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Thermally stable, sub-nanometer equivalent oxide thickness gate stack for gate-first In0.53Ga0.47As metal-oxide-semiconductor field-effect-transistors

Abstract: Articles you may be interested inHigh performance raised source/drain InAs/In0.53Ga0.47As channel metal-oxide-semiconductor field-effecttransistors with reduced leakage using a vertical spacer Appl. Phys. Lett. 103, 233503 (2013); 10.1063/1.4838660 Effect of annealing ambient and temperature on the electrical characteristics of atomic layer deposition Al2O3/In0.53Ga0.47As metal-oxide-semiconductor capacitors and MOSFETs J. Appl. Phys. 111, 044105 (2012); 10.1063/1.3686628 In0.53Ga0.47As metal-oxide-semiconduct… Show more

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Cited by 22 publications
(21 citation statements)
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“…1(b). This is capacitance density is higher than values in the literature, [27][28][29] while a very low D it is maintained. Attempts to scale films grown on recipe A-cleaned surfaces to comparable thicknesses resulted in higher D it , as exhibited by large frequency dispersion at negative biases.…”
Section: Resultscontrasting
confidence: 48%
“…1(b). This is capacitance density is higher than values in the literature, [27][28][29] while a very low D it is maintained. Attempts to scale films grown on recipe A-cleaned surfaces to comparable thicknesses resulted in higher D it , as exhibited by large frequency dispersion at negative biases.…”
Section: Resultscontrasting
confidence: 48%
“…1(a), the accumulation capacitance density is 3.5 lF/cm 2 at 1 MHz, which is larger than that of any other III-V gate stack reported in the literature. 5,15,16 A small CV hysteresis of 0.2 V at 1 MHz could be detected (see inset). At low frequencies, the measured accumulation capacitance, C m , suffers from artifacts from gate leakage, which is expected, given the low physical thickness.…”
mentioning
confidence: 94%
“…From the device geometry we can estimate a (single) PET gate–common capacitance of approximately 0.1,fF, and a corresponding RC delay time of the same order as the sound transmission time. The capacitance of a (single) CMOS logic gate is also approximately 0.1 fF at 10 nm scale given the 30:1 width/length ratio of a (single) CMOS logic FET 29. Thus a 10 times drop in voltage relative to CMOS results in a 100 times drop in switching energy and power of PETs relative to CMOS logic FETs (at the same clock frequency).…”
mentioning
confidence: 99%