Thermal ink jet technology

Substrate coupling in digital circuits in mixed-signal smart-power systems

“…A set of test circuits inspired by smart-power applications [17], [21] was developed to experimentally analyze the substrate noise behavior of sensitive digital circuits. In these test circuits, the substrate noise is generated by controlled switching of groups of eight individually selectable power drivers powered at 38 V. A power driver is shown in detail in Fig.…”

“…2(b). Note that each power driver is driven by 13 V predrivers [17], [22] whereas the predrivers are controlled by standard 5 V logic. Approximately 50 test circuits, in both nMOS and CMOS processes, were designed, fabricated, and tested.…”

“…During testing, it was observed that the power transistors generate substrate noise not only during the on/off transition process, as described in [1]- [5] and illustrated in Fig. 1, but also while operating in the linear region [17], [22]. An oscillatory substrate noise waveform shown in Fig.…”

“…1 (bottom) on both an inverter and a simple latch [17] are analyzed in this section (both nMOS and CMOS circuits are analyzed). The analysis is performed by evaluating test circuits and observing the test circuit behavior under simulation using the Cadence-Spectre simulator [18].…”

“…If a power resistor is required to dissipate a certain power (as in the present target application [17]), it is preferable to operate the power resistor at larger currents (with larger transistors) rather than at large voltages.…”