2021 IEEE 8th Workshop on Wide Bandgap Power Devices and Applications (WiPDA) 2021
DOI: 10.1109/wipda49284.2021.9645075
|View full text |Cite
|
Sign up to set email alerts
|

Thermal and Thermomechanical Analysis of a 10 kV SiC MOSFET Package with Double-Sided Cooling

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1

Citation Types

0
4
0

Year Published

2023
2023
2024
2024

Publication Types

Select...
2
1

Relationship

1
2

Authors

Journals

citations
Cited by 3 publications
(4 citation statements)
references
References 16 publications
0
4
0
Order By: Relevance
“…Further, as most of the heat is removed through the device metal contacts, the effective heat dissipation area will be smaller for a junction-side cooling package than for a bottom-side cooling package since the bottom metal contact covers the entire chip area while the top contact does not due to the edge termination, gate and passivation. Double-side cooling packages (shown in figure 3(c)) are gaining increased attention for their superior thermal management due to both bottom-and top-side cooling paths [21,84,85]. Such a package may offer the opportunity to address the thermal limitations of some WBG or UWBG materials with low k T .…”
Section: Basics Of Power Device/package Thermal Managementmentioning
confidence: 99%
See 3 more Smart Citations
“…Further, as most of the heat is removed through the device metal contacts, the effective heat dissipation area will be smaller for a junction-side cooling package than for a bottom-side cooling package since the bottom metal contact covers the entire chip area while the top contact does not due to the edge termination, gate and passivation. Double-side cooling packages (shown in figure 3(c)) are gaining increased attention for their superior thermal management due to both bottom-and top-side cooling paths [21,84,85]. Such a package may offer the opportunity to address the thermal limitations of some WBG or UWBG materials with low k T .…”
Section: Basics Of Power Device/package Thermal Managementmentioning
confidence: 99%
“…Examples of such interconnect methods include soldering lead frames or substrates directly to the die topside contacts [20,76,92], soldering or sintering Cu, Mo or Cu-Mo posts or bumps between the die and the substrate [93][94][95][96], and drilling and electroplating Cu-filled vias for PCB-embedded packages [97][98][99]. As an example, the use of Cu and Mo posts in a double-side cooled configuration was utilized to achieve an overall R th,j-c of just 0.17 • C W −1 for a 10 kV, 25 A SiC MOSFET [85].…”
Section: Sic Diode and Mosfetmentioning
confidence: 99%
See 2 more Smart Citations